US Patent Application 18337587. Circuit and Method for Stepping Down a Voltage simplified abstract

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Circuit and Method for Stepping Down a Voltage

Organization Name

Taiwan Semiconductor Manufacturing Company, Ltd.


Inventor(s)

Bindu Madhavi Kasina of Hsinchu (TW)

Szu-Chun Tsao of Hsinchu (TW)

Jaw-Juinn Horng of Hsinchu (TW)

Circuit and Method for Stepping Down a Voltage - A simplified explanation of the abstract

This abstract first appeared for US patent application 18337587 titled 'Circuit and Method for Stepping Down a Voltage

Simplified Explanation

The patent application describes systems and methods for voltage stepdown in a circuit.

  • The circuit includes a first voltage stepdown module and a second voltage stepdown module.
  • The first voltage stepdown module takes a supply voltage and a first reference voltage as inputs and produces an intermediate stepped down voltage as an output.
  • The intermediate stepped down voltage is then fed back into the first voltage stepdown module.
  • The second voltage stepdown module includes a low-dropout voltage regulator.
  • The second voltage stepdown module takes the intermediate stepped down voltage and a second reference voltage as inputs and produces a target voltage as an output.


Original Abstract Submitted

Systems and methods as described herein may take a variety of forms. In an example, a circuit includes a first voltage stepdown module and a second voltage stepdown module. The first voltage stepdown module has a supply voltage and a first reference voltage as inputs, and an intermediate stepped down voltage as an output, the intermediate stepped down voltage being electrically coupled to a feedback input of the first voltage stepdown module. The second voltage stepdown module includes a low-dropout voltage regulator having the intermediate stepped down voltage and a second reference voltage as inputs and a target voltage as an output.