US Patent Application 18336044. INTEGRATED CIRCUIT, TRANSISTOR AND METHOD OF FABRICATING THE SAME simplified abstract
Contents
INTEGRATED CIRCUIT, TRANSISTOR AND METHOD OF FABRICATING THE SAME
Organization Name
Taiwan Semiconductor Manufacturing Company, Ltd.
Inventor(s)
Sheng-Chih Lai of Hsinchu County (TW)
Feng-Cheng Yang of Hsinchu County (TW)
Chung-Te Lin of Tainan City (TW)
INTEGRATED CIRCUIT, TRANSISTOR AND METHOD OF FABRICATING THE SAME - A simplified explanation of the abstract
- This abstract for appeared for US patent application number 18336044 Titled 'INTEGRATED CIRCUIT, TRANSISTOR AND METHOD OF FABRICATING THE SAME'
Simplified Explanation
The abstract describes the structure of a transistor, which is an electronic device used to control the flow of electrical current. The transistor consists of several layers including a gate electrode, a ferroelectric layer, a channel layer, a gas impermeable layer, a dielectric layer, a source line, and a bit line.
The ferroelectric layer is placed on top of the gate electrode, while the channel layer is placed on top of the ferroelectric layer. The gas impermeable layer is located between the channel layer and the gate electrode, and it is in contact with the ferroelectric layer. The dielectric layer surrounds both the ferroelectric layer and the channel layer, and it is in contact with the gas impermeable layer.
Embedded within the dielectric layer are the source line and the bit line, which are connected to the channel layer. These lines are responsible for providing the necessary electrical connections for the transistor to function properly.
Overall, this abstract provides a concise description of the different layers and components that make up the transistor structure.
Original Abstract Submitted
A transistor includes a gate electrode, a ferroelectric layer, a channel layer, a gas impermeable layer, a dielectric layer, a source line and a bit line. The ferroelectric layer is disposed on the gate electrode. The channel layer is disposed on the ferroelectric layer. The gas impermeable layer is disposed in between the channel layer and the gate electrode, and in contact with the ferroelectric layer. The dielectric layer is surrounding the ferroelectric layer and the channel layer, and in contact with the gas impermeable layer. The source line and the bit line are embedded in the dielectric layer and connected to the channel layer.
