US Patent Application 18335294. Integrated Fan Out Method Utilizing a Filler-Free Insulating Material simplified abstract

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Integrated Fan Out Method Utilizing a Filler-Free Insulating Material

Organization Name

Taiwan Semiconductor Manufacturing Co., Ltd.


Inventor(s)

Wei-Chih Chen of Taipei (TW)


Sih-Hao Liao of New Taipei (TW)


Yu-Hsiang Hu of Hsinchu (TW)


Hung-Jui Kuo of Hsinchu (TW)


Integrated Fan Out Method Utilizing a Filler-Free Insulating Material - A simplified explanation of the abstract

  • This abstract for appeared for US patent application number 18335294 Titled 'Integrated Fan Out Method Utilizing a Filler-Free Insulating Material'

Simplified Explanation

The abstract describes a method of creating a redistribution structure using insulating materials that have a high shrinkage rate and do not contain any filler. This allows for the achievement of good planarity without the need for planarization of each insulating layer in the structure. This simplifies the process of creating the redistribution structure.


Original Abstract Submitted

A redistribution structure is made using filler-free insulating materials with a high shrinkage rate. As a result, good planarity may be achieved without the need to perform a planarization of each insulating layer of the redistribution structure, thereby simplifying the formation of the redistribution structure.