US Patent Application 18321552. METHOD AND SYSTEM TO BALANCE GROUND BOUNCE simplified abstract

METHOD AND SYSTEM TO BALANCE GROUND BOUNCE

Organization Name

TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

Inventor(s)

Hidehiro Fujiwara of Hsin-chu (TW)

Hsien-Yu Pan of Hsinchu City (TW)

Chih-Yu Lin of Taichung City (TW)

Yen-Huei Chen of Jhudong Township (TW)

Wei-Chang Zhao of Hsinchu (TW)

METHOD AND SYSTEM TO BALANCE GROUND BOUNCE - A simplified explanation of the abstract

This abstract first appeared for US patent application 18321552 titled 'METHOD AND SYSTEM TO BALANCE GROUND BOUNCE

Simplified Explanation

The patent application describes a memory cell with a write port and a read port.

• The write port consists of two inverters connected between two power source signal lines, forming a storage unit.
• The write port also includes a first local interconnect line connected to the second power source signal line.
• The read port includes a transistor connected to the storage unit and the second power source signal line.
• The read port also includes a second local interconnect line connected to the second power source signal line.
• The second local interconnect line in the read port is separate from the first local interconnect line in the write port.

Original Abstract Submitted

A memory cell includes a write port and a read port. The write port includes two cross-coupled inverters that form a storage unit. The cross-coupled inverters are connected between a first power source signal line and a second power source signal line. The write port also includes a first local interconnect line in an interconnect layer that is connected to the second power source signal line. The read port includes a transistor that is connected to the storage unit in the write port and to the second power source signal line, and a second local interconnect line in the interconnect layer that is connected to the second power source signal line. The second local interconnect line in the read port is separate from the first local interconnect line in the write port.