US Patent Application 18307196. SPIKE NEURAL NETWORK CIRCUIT INCLUDING INPUT SPIKE DETECTING CIRCUIT AND OPERATING METHOD THEREOF simplified abstract

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SPIKE NEURAL NETWORK CIRCUIT INCLUDING INPUT SPIKE DETECTING CIRCUIT AND OPERATING METHOD THEREOF

Organization Name

ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE

Inventor(s)

Kwang IL Oh of Daejeon (KR)

Byung-Do Yang of Daejeon (KR)

Dongwon Lee of Daejeon (KR)

Jae-Jin Lee of Daejeon (KR)

SPIKE NEURAL NETWORK CIRCUIT INCLUDING INPUT SPIKE DETECTING CIRCUIT AND OPERATING METHOD THEREOF - A simplified explanation of the abstract

This abstract first appeared for US patent application 18307196 titled 'SPIKE NEURAL NETWORK CIRCUIT INCLUDING INPUT SPIKE DETECTING CIRCUIT AND OPERATING METHOD THEREOF

Simplified Explanation

The abstract describes a spike neural network circuit that includes various components such as a synaptic circuit, an axon circuit, an input spike detecting circuit, and a first neuron circuit.

  • The spike neural network circuit is designed to mimic the behavior of neurons in the brain.
  • The synaptic circuit consists of synapses arranged in rows and columns, which allow for communication between different parts of the network.
  • The axon circuit generates input spike signals that are provided to specific rows in the synaptic circuit.
  • The input spike detecting circuit detects pulses in the input spike signals and generates an enable signal.
  • The first neuron circuit compares the voltage level of an accumulated signal from a specific column with a threshold voltage level.
  • If the voltage level of the accumulated signal exceeds the threshold, the first neuron circuit outputs an output spike signal.

Overall, this patent application describes a specific circuit design for a spike neural network that enables communication and processing of information within the network.


Original Abstract Submitted

Disclosed is a spike neural network circuit including a synaptic circuit including synapses arranged in rows and columns, an axon circuit that generates a first input spike signal to be provided to a first row among the rows, and a second input spike signal to be provided to a second row among the rows, an input spike detecting circuit that generates an enable signal when detecting a pulse from at least one of the first input spike signal and the second input spike signal, and a first neuron circuit that compares a voltage level of a first accumulated signal, which is output from a first column among the columns, with a threshold voltage level in response to the enable signal, and outputs a first output spike signal when the voltage level of the first accumulated signal exceeds the threshold voltage level.