US Patent Application 18302999. POWER ERROR MONITORING AND REPORTING WITHIN A SYSTEM ON CHIP FOR FUNCTIONAL SAFETY simplified abstract
POWER ERROR MONITORING AND REPORTING WITHIN A SYSTEM ON CHIP FOR FUNCTIONAL SAFETY
Organization Name
Inventor(s)
Prashant D. Chaudhari of Folsom CA (US)
Bradley T. Coffman of Hillsboro OR (US)
Gustavo P. Espinosa of Portland OR (US)
Ivan Rodrigo Herrera Mejia of El Dorado Hills CA (US)
POWER ERROR MONITORING AND REPORTING WITHIN A SYSTEM ON CHIP FOR FUNCTIONAL SAFETY - A simplified explanation of the abstract
This abstract first appeared for US patent application 18302999 titled 'POWER ERROR MONITORING AND REPORTING WITHIN A SYSTEM ON CHIP FOR FUNCTIONAL SAFETY
Simplified Explanation
The patent application describes a technology that includes a system on chip (SoC) with an integrated voltage regulator and a power management controller.
- The SoC has a first communication path that carries power error information to the power management controller.
- There is also a second communication path that carries the power error information to an error pin of the SoC.
- The power error information is specifically related to the integrated voltage regulator.
Original Abstract Submitted
Methods, systems and apparatuses may provide for technology that includes a system on chip (SoC) having an integrated voltage regulator and a power management controller, and a first communication path coupled to the power management controller, wherein the first communication path is to carry power error information to the power management controller. The technology may also include a second communication path coupled to an error pin of the SoC, wherein the second communication path is to carry the power error information to the error pin, and wherein the power error information is associated with the integrated voltage regulator.
