US Patent Application 18248113. MEMORY CELL ARRAY UNIT simplified abstract

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MEMORY CELL ARRAY UNIT

Organization Name

SONY SEMICONDUCTOR SOLUTIONS CORPORATION

Inventor(s)

LUI Sakai of TOKYO (JP)

YASUO Kanda of KANAGAWA (JP)

MEMORY CELL ARRAY UNIT - A simplified explanation of the abstract

This abstract first appeared for US patent application 18248113 titled 'MEMORY CELL ARRAY UNIT

Simplified Explanation

The patent application describes a memory cell array unit that includes a memory cell array and a microcontroller.

  • The memory cell array has an n-bit allocation bit allocated by a memory controller for read/write control.
  • The memory cell array also has a redundant bit, which is not provided with a switching mechanism like the allocation bit.
  • The microcontroller uses the allocation bit and the redundant bit to read and write n-bit data from and into the memory cell array.
  • The microcontroller performs these operations based on the read/write control received from the memory controller.


Original Abstract Submitted

A memory cell array unit according to an embodiment of the present disclosure includes a memory cell array and a microcontroller. The memory cell array includes an n-bit allocation bit allocated from a memory controller in read/write control, and a redundant bit of one or a plurality of bits not being provided with a switching mechanism that switches as a substitution for a portion of the allocation bit. The microcontroller reads and writes n-bit data from and into the memory cell array using the allocation bit and the redundant bit on the basis of the read/write control from the memory controller.