US Patent Application 18234003. SCAN TESTING USING SCAN FRAMES WITH EMBEDDED COMMANDS simplified abstract

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SCAN TESTING USING SCAN FRAMES WITH EMBEDDED COMMANDS

Organization Name

TEXAS INSTRUMENTS INCORPORATED

Inventor(s)

Lee D. Whetsel of Parker TX (US)

SCAN TESTING USING SCAN FRAMES WITH EMBEDDED COMMANDS - A simplified explanation of the abstract

This abstract first appeared for US patent application 18234003 titled 'SCAN TESTING USING SCAN FRAMES WITH EMBEDDED COMMANDS

Simplified Explanation

- The patent application describes a test architecture for integrated circuits. - The architecture includes a scan frame input shift register, a scan frame output shift register, a test controller, and a test interface. - The test interface consists of a scan input, a scan clock, a test enable, and a scan output. - Scan frames are used to input test stimulus data and test commands into the shift register. - The output shift register produces scan frames with test response data and potentially other output data. - The command section of the input scan frame controls the test architecture to perform the desired test operation.

  • The patent application aims to improve the testing process for integrated circuits.
  • It introduces a test architecture that utilizes shift registers and a test interface.
  • The architecture allows for the input of test stimulus data and commands.
  • It also enables the output of test response data and potentially other output data.
  • The command section of the input scan frame controls the execution of desired test operations.


Original Abstract Submitted

Testing of integrated circuits is achieved by a test architecture utilizing a scan frame input shift register, a scan frame output shift register, a test controller, and a test interface comprising a scan input, a scan clock, a test enable, and a scan output. Scan frames input to the scan frame input shift register contain a test stimulus data section and a test command section. Scan frames output from the scan frame output shift register contain a test response data section and, optionally, a section for outputting other data. The command section of the input scan frame controls the test architecture to execute a desired test operation.

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