US Patent Application 18232765. ACCELERATED MEMORY TRAINING THROUGH IN-BAND CONFIGURATION REGISTER UPDATE MODE simplified abstract
ACCELERATED MEMORY TRAINING THROUGH IN-BAND CONFIGURATION REGISTER UPDATE MODE
Organization Name
Inventor(s)
Saravanan Sethuraman of Portland OR (US)
Tonia M. Rose of Wendell NC (US)
ACCELERATED MEMORY TRAINING THROUGH IN-BAND CONFIGURATION REGISTER UPDATE MODE - A simplified explanation of the abstract
This abstract first appeared for US patent application 18232765 titled 'ACCELERATED MEMORY TRAINING THROUGH IN-BAND CONFIGURATION REGISTER UPDATE MODE
Simplified Explanation
- The patent application describes a mode for updating configuration registers in a clock driver or a dynamic random access memory (DRAM) device. - This update mode allows the memory device to configure multiple configuration registers using in-band register writes. - The in-band register writes can be used to configure settings for decision feedback equalization (DFE) and other configuration settings for the memory device interface. - This innovation provides a more efficient and flexible way to update configuration registers in clock drivers and DRAM devices.
Original Abstract Submitted
A configuration register update mode can be implemented as a register word update (RWUPD) mode for a registering clock driver (RCD) or as a mode register update (MRUPD) mode for a dynamic random access memory (DRAM) device. In the update mode, In the update mode, the memory device (either the RCD or the DRAM) can perform configuration of any number of configuration registers with in-band register writes. The in-band register writes can be used to configure decision feedback equalization (DFE) settings, as well as other configuration settings for non-DFE configurations of a memory device interface.
