US Patent Application 18232542. MEMORY DEVICE WITH SOURCE LINE CONTROL simplified abstract
Contents
MEMORY DEVICE WITH SOURCE LINE CONTROL
Organization Name
Taiwan Semiconductor Manufacturing Company, Ltd.
Inventor(s)
Perng-Fei Yuh of Hsinchu City (TW)
MEMORY DEVICE WITH SOURCE LINE CONTROL - A simplified explanation of the abstract
This abstract first appeared for US patent application 18232542 titled 'MEMORY DEVICE WITH SOURCE LINE CONTROL
Simplified Explanation
- The patent application is related to a memory device that includes memory cells and a memory controller. - Each memory cell in the device consists of a select transistor and a storage element connected in series between a bit line and a source line. - The memory controller is responsible for controlling the writing process in the memory device. - During the writing process, the memory controller applies a first write voltage to the bit line of a selected memory cell. - The memory controller also applies a second write voltage to the word line connected to the select transistor's gate electrode during a specific time period. - Additionally, the memory controller applies a third write voltage to the source line connected to the selected memory cell. - The second write voltage is set to be between the first write voltage and the third write voltage. - The purpose of this configuration is not explicitly mentioned in the abstract.
Original Abstract Submitted
Disclosed herein are related to a memory device including a set of memory cells and a memory controller. In one aspect, each of the set of memory cells includes a select transistor and a storage element connected in series between a corresponding bit line and a corresponding source line. In one aspect, the memory controller is configured to apply a first write voltage to a bit line coupled to a selected memory cell, apply a second write voltage to a word line coupled to a gate electrode of a select transistor of the selected memory cell during a first time period, and apply a third write voltage to a source line coupled to the selected memory cell. The second write voltage may be between the first write voltage and the third write voltage.
