US Patent Application 18231414. SPIN-ORBIT TORQUE MRAM STRUCTURE AND MANUFACTURE THEREOF simplified abstract

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SPIN-ORBIT TORQUE MRAM STRUCTURE AND MANUFACTURE THEREOF

Organization Name

Applied Materials, Inc.

Inventor(s)

Minrui Yu of Santa Clara CA (US)

Wenhui Wang of San Jose CA (US)

Jaesoo Ahn of San Jose CA (US)

Jong Mun Kim of San Jose CA (US)

Sahil Patel of Sunnyvale CA (US)

Lin Xue of San Diego CA (US)

Chando Park of Palo Alto CA (US)

Mahendra Pakala of Santa Clara CA (US)

Chentsau Chris Ying of Cupertino CA (US)

Huixiong Dai of San Jose CA (US)

Christopher S. Ngai of Burlingame CA (US)

SPIN-ORBIT TORQUE MRAM STRUCTURE AND MANUFACTURE THEREOF - A simplified explanation of the abstract

This abstract first appeared for US patent application 18231414 titled 'SPIN-ORBIT TORQUE MRAM STRUCTURE AND MANUFACTURE THEREOF

Simplified Explanation

The patent application is about spin-orbit torque magnetoresistive random-access memory (SOT-MRAM) devices and their manufacturing methods.

  • SOT-MRAM devices have an SOT layer and a magnetic tunnel junction (MTJ) stack.
  • The SOT layer is laterally aligned with the MTJ stack and is formed over a trench in an interconnect.
  • This eliminates the presence of the SOT layer outside the area of the MTJ stack.
  • Electric current passes from the interconnect to the SOT layer through SOT-interconnect overlap.
  • This reduces the formation of shunting current.
  • The MTJ self-aligns with the SOT layer in a single etching process.


Original Abstract Submitted

Embodiments of the present disclosure generally include spin-orbit torque magnetoresistive random-access memory (SOT-MRAM) devices and methods of manufacture thereof. The SOT-MRAM devices described herein include an SOT layer laterally aligned with a magnetic tunnel junction (MTJ) stack and formed over a trench in an interconnect. Thus, the presence of the SOT layer outside the area of the MTJ stack is eliminated, and electric current passes from the interconnect to the SOT layer by SOT-interconnect overlap. The devices and methods described herein reduce the formation of shunting current and enable the MTJ to self-align with the SOT layer in a single etching process.