US Patent Application 18230712. SURFACE OXIDATION CONTROL OF METAL GATES USING CAPPING LAYER simplified abstract
Contents
SURFACE OXIDATION CONTROL OF METAL GATES USING CAPPING LAYER
Organization Name
Taiwan Semiconductor Manufacturing Company, Ltd.
Inventor(s)
SURFACE OXIDATION CONTROL OF METAL GATES USING CAPPING LAYER - A simplified explanation of the abstract
This abstract first appeared for US patent application 18230712 titled 'SURFACE OXIDATION CONTROL OF METAL GATES USING CAPPING LAYER
Simplified Explanation
The patent application describes a method for fabricating a semiconductor device with a replacement gate stack. Here are the key points:
- A dummy gate stack is formed on a semiconductor fin.
- Gate spacers are formed on the sidewalls of the dummy gate stack.
- A first inter-layer dielectric is formed, with the gate spacers and dummy gate stack inside it.
- The dummy gate stack is removed, creating a trench between the gate spacers.
- A replacement gate stack is formed in the trench.
- A dielectric capping layer is deposited, with its bottom surface contacting the top surface of the replacement gate stack and the first inter-layer dielectric.
- A second inter-layer dielectric is deposited over the dielectric capping layer.
- A source/drain contact plug is formed, extending into the second inter-layer dielectric, dielectric capping layer, and first inter-layer dielectric.
Original Abstract Submitted
A method includes forming a dummy gate stack on a semiconductor fin, forming gate spacers on sidewalls of the dummy gate stack, forming a first inter-layer dielectric, with the gate spacers and the dummy gate stack being in the first inter-layer dielectric, removing the dummy gate stack to form a trench between the gate spacers, forming a replacement gate stack in the trench, and depositing a dielectric capping layer. A bottom surface of the dielectric capping layer contacts a first top surface of the replacement gate stack and a second top surface of the first inter-layer dielectric. A second inter-layer dielectric is deposited over the dielectric capping layer. A source/drain contact plug is formed and extends into the second inter-layer dielectric, the dielectric capping layer, and the first inter-layer dielectric.
