US Patent Application 18224409. INTELLIGENT PATH SELECTION AND LOAD BALANCING simplified abstract
Contents
INTELLIGENT PATH SELECTION AND LOAD BALANCING
Organization Name
Inventor(s)
Zhengyu Yang of San Diego CA (US)
Nithya Ramakrishnan of San Diego CA (US)
Allen Russell Andrews of El Cajon CA (US)
Sudheendra Grama Sampath of San Diego CA (US)
T. David Evans of San Diego CA (US)
Clay Mayers of San Diego CA (US)
INTELLIGENT PATH SELECTION AND LOAD BALANCING - A simplified explanation of the abstract
This abstract first appeared for US patent application 18224409 titled 'INTELLIGENT PATH SELECTION AND LOAD BALANCING
Simplified Explanation
The abstract describes a method for managing input-output in a system that includes a centralized processing circuit, multiple storage targets, and two input-output processors.
- The method involves determining if the first input-output processor is connected to a specific storage target and if the second input-output processor is also connected to the same target.
- If both processors are connected to the target, the method dispatches a set of input-output requests to each processor based on their respective service rates to the target.
- The dispatching is done in proportion to the service rate of the first processor and the service rate of the second processor.
- The goal is to efficiently distribute the input-output requests between the processors based on their capabilities and the demands of the target.
Original Abstract Submitted
A method for dispatching input-output in a system. The system may include a centralized processing circuit, a plurality of persistent storage targets, a first input-output processor, and a second input-output processor. The method may include determining whether the first input-output processor is connected to a first target of the plurality of persistent storage targets; determining whether the second input-output processor is connected to the first target; and in response to determining that both the first input-output processor is connected to the first target, and the second input-output processor is connected to the first target, dispatching a first plurality of input-output requests, each to either the first input-output processor or the second input-output processor, the dispatching being in proportion to a service rate of the first input-output processor to the first target and a service rate of the second input-output processor to the first target, respectively.
