US Patent Application 18220397. Separate Epitaxy Layers for Nanowire Stack GAA Device simplified abstract
Contents
Separate Epitaxy Layers for Nanowire Stack GAA Device
Organization Name
Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor(s)
Kai-Tai Chang of Kaohsiung City (TW)
Meng-Hsuan Hsiao of Hsinchu (TW)
Separate Epitaxy Layers for Nanowire Stack GAA Device - A simplified explanation of the abstract
This abstract first appeared for US patent application 18220397 titled 'Separate Epitaxy Layers for Nanowire Stack GAA Device
Simplified Explanation
- This patent application describes a technique for creating gate-all-around (GAA) devices using stacks of nanowire semiconductor strips. - The nanowire semiconductor strips are formed separately and tailored specifically for the GAA devices. - A trench is created in a first stack of epitaxy layers to make room for a second stack of epitaxy layers. - The bottom of the trench is modified to have specific parameters, such as shape or crystalline facet orientations. - These known parameters of the trench bottom are used to select appropriate processes for filling the trench with a flat base surface.
Original Abstract Submitted
The current disclosure describes techniques for forming gate-all-around (“GAA”) devices from stacks of separately formed nanowire semiconductor strips. The separately formed nanowire semiconductor strips are tailored for the respective GAA devices. A trench is formed in a first stack of epitaxy layers to define a space for forming a second stack of epitaxy layers. The trench bottom is modified to have determined or known parameters in the shapes or crystalline facet orientations. The known parameters of the trench bottom are used to select suitable processes to fill the trench bottom with a relatively flat base surface.
