US Patent Application 18220073. VERTICAL MEMORY DEVICES simplified abstract
Contents
VERTICAL MEMORY DEVICES
Organization Name
Inventor(s)
DONGHWAN Kim of SEONGNAM-SI (KR)
YOUNGHWAN Son of HWASEONG-SI (KR)
SHINHWAN Kwan of SUWON-SI (KR)
JEEHOON Han of HWASEONG-SI (KR)
VERTICAL MEMORY DEVICES - A simplified explanation of the abstract
This abstract first appeared for US patent application 18220073 titled 'VERTICAL MEMORY DEVICES
Simplified Explanation
The patent application describes a vertical memory device with gate electrodes, a channel, a conductive through via, and insulation structures.
- The gate electrodes are arranged in a staircase shape on a substrate.
- The channel runs through the gate electrodes.
- A conductive through via connects to a first gate electrode and extends through the second gate electrodes below it.
- Insulation structures separate the conductive through via from the sidewalls of the second gate electrodes.
Original Abstract Submitted
A vertical memory device includes gate electrodes, a channel, a first conductive through via, and insulation structures. The gate electrodes are spaced apart from each other on a substrate in a first direction substantially perpendicular to an upper surface of the substrate, and may be stacked in a staircase shape. The channel extends through the gate electrodes in the first direction. The first conductive through via extends through a conductive pad of a first gate electrode among the gate electrodes and is electrically connected thereto. The first conductive through via extends through second gate electrodes from among the gate electrodes that are under the first gate electrode. The insulation structures are formed between the first conductive through via and sidewalls of each of the second gate electrodes, and electrically insulates the first conductive through via from each of the second gate electrodes.
