US Patent Application 18210960. DATA DRIVING CIRCUIT AND DISPLAY DEVICE INCLUDING THE SAME simplified abstract

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DATA DRIVING CIRCUIT AND DISPLAY DEVICE INCLUDING THE SAME

Inventors

Hyung Gun Ma of Yongin-si (KR)


Gyu Wan Lim of Daejeon (KR)


Gyeong Gu Kang of Daejeon (KR)


Hyun Sik Kim of Daejeon (KR)


Keum Dong Jung of Yongin-si (KR)


Moon Jae Jeong of Yongin-si (KR)


DATA DRIVING CIRCUIT AND DISPLAY DEVICE INCLUDING THE SAME - A simplified explanation of the abstract

  • This abstract for appeared for US patent application number 18210960 Titled 'DATA DRIVING CIRCUIT AND DISPLAY DEVICE INCLUDING THE SAME'

Simplified Explanation

The abstract describes a circuit that uses a resistor string and multiple data channels to convert digital data signals into analog voltages. The resistor string consists of multiple resistors connected in series. Each data channel includes a main digital-to-analog converter connected to the high voltage node, intermediate voltage nodes, and low voltage node of the resistor string. It also includes a multiplier connected to the output of the main digital-to-analog converter, a sub digital-to-analog converter connected to some of the voltage nodes, and a voltage synthesizer connected to the output of the multiplier and the output of the sub digital-to-analog converter.


Original Abstract Submitted

A data driving circuit includes: a resistor string in which a plurality of resistors are connected in series; and a plurality of data channels connected to a high voltage node, intermediate voltage nodes, and a low voltage node of the resistor string and configured to convert a digital data signal into an analog data voltage. Each of the plurality of data channels includes: a main digital-to-analog converter connected to the high voltage node, the intermediate voltage nodes, and the low voltage node, a multiplier connected to an output terminal of the main digital-to-analog converter, a sub digital-to-analog converter connected to some of the high voltage node, the intermediate voltage nodes, and the low voltage node, and a voltage synthesizer connected to an output terminal of the multiplier and an output terminal of the sub digital-to-analog converter.