INTEGRATED CIRCUIT INCLUDING STATIC RANDOM ACCESS MEMORY DEVICE

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INTEGRATED CIRCUIT INCLUDING STATIC RANDOM ACCESS MEMORY DEVICE - A simplified explanation of the abstract

This abstract first appeared for US patent application 18201465 titled 'INTEGRATED CIRCUIT INCLUDING STATIC RANDOM ACCESS MEMORY DEVICE

Simplified Explanation

The abstract describes an integrated circuit that includes a static random access memory (SRAM) device.

The SRAM device consists of an SRAM unit cell with multiple transistors connected to output nodes.
The first output node is connected to various components such as gate electrodes, connection wiring lines, and active contacts.
The layout of these components forms a specific shape called a "first fork shape".

Original Abstract Submitted

An integrated circuit includes a static random access memory (SRAM) device. The SRAM device includes an SRAM unit cell that includes a first output node to which a first pull-up transistor, a first pull-down transistor, and a second pull-down transistor are commonly connected, and a second output node to which a second pull-up transistor, a third pull-down transistor, and a fourth pull-down transistor are commonly connected. The first output node is connected to a first gate electrode, a second gate electrode, a first connection wiring line, a first node formation pattern, and a first active contact, and a layout of the first output node, the first gate electrode, the second gate electrode, the first connection wiring line, the first node formation pattern, and the first active contact forms a first fork shape.

US Patent Application 18201465. INTEGRATED CIRCUIT INCLUDING STATIC RANDOM ACCESS MEMORY DEVICE simplified abstract

Contents

INTEGRATED CIRCUIT INCLUDING STATIC RANDOM ACCESS MEMORY DEVICE

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