US Patent Application 18185122. PERFORMANCE SCALING FOR BINARY TRANSLATION simplified abstract
Contents
PERFORMANCE SCALING FOR BINARY TRANSLATION
Organization Name
Microsoft Technology Licensing, LLC
Inventor(s)
Hee Jun Park of Redmond WA (US)
Mehmet Iyigun of Redmond WA (US)
PERFORMANCE SCALING FOR BINARY TRANSLATION - A simplified explanation of the abstract
- This abstract for appeared for US patent application number 18185122 Titled 'PERFORMANCE SCALING FOR BINARY TRANSLATION'
Simplified Explanation
This abstract discusses a method to improve user experiences when running binary code that has been translated from one instruction set architecture (ISA) to another. Binary code from a source ISA cannot directly run on a processor that uses a different target ISA. To overcome this, the source code is translated into the target ISA and then executed on the processor. However, this translation process incurs overhead, which can impact performance. To compensate for this, the translated code is executed at a faster speed compared to non-translated code. Additionally, the processor's power-performance parameters can be adjusted to further enhance the performance of the translated code. The degree of translation overhead determines the extent of the increase in power-performance for the translated code.
Original Abstract Submitted
Embodiments relate to improving user experiences when executing binary code that has been translated from other binary code. Binary code (instructions) for a source instruction set architecture (ISA) cannot natively execute on a processor that implements a target ISA. The instructions in the source ISA are binary-translated to instructions in the target ISA and are executed on the processor. The overhead of performing binary translation and/or the overhead of executing binary-translated code are compensated for by increasing the speed at which the translated code is executed, relative to non-translated code. Translated code may be executed on hardware that has one or more power-performance parameters of the processor set to increase the performance of the processor with respect to the translated code. The increase in power-performance for translated code may be proportional to the degree of translation overhead.
