US Patent Application 18119502. PIXEL CIRCUIT AND DISPLAY DEVICE HAVING THE SAME simplified abstract
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PIXEL CIRCUIT AND DISPLAY DEVICE HAVING THE SAME
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PIXEL CIRCUIT AND DISPLAY DEVICE HAVING THE SAME - A simplified explanation of the abstract
This abstract first appeared for US patent application 18119502 titled 'PIXEL CIRCUIT AND DISPLAY DEVICE HAVING THE SAME
Simplified Explanation
The patent application describes a pixel circuit that includes multiple transistors and gate signals to control the operation of the circuit.
- The pixel circuit includes a first transistor and a second transistor.
- The second transistor receives a write gate signal generated based on clock signals.
- The first electrode of the second transistor receives a data voltage.
- The second electrode of the second transistor is electrically connected to the first transistor.
- The pixel circuit also includes a third transistor and a fourth transistor.
- The third transistor receives a compensation gate signal generated based on a next write gate signal.
- The first and second electrodes of the third transistor are electrically connected to the first transistor.
- The fourth transistor receives an initialization gate signal generated based on a previous write gate signal.
- The first electrode of the fourth transistor receives a first initialization voltage.
- The second electrode of the fourth transistor is electrically connected to the first transistor.
Original Abstract Submitted
A pixel circuit includes a first transistor, a second transistor including a control electrode receiving a write gate signal generated based on clock signals having a duration of M horizontal time, M being a positive integer greater than or equal to 2, a first electrode receiving a data voltage, and a second electrode electrically connected to the first transistor, a third transistor including a control electrode receiving a compensation gate signal generated based on a first next write gate signal applied after the write gate signal is applied, a first and second electrodes electrically connected to the first transistor, and a fourth transistor including a control electrode receiving an initialization gate signal generated based on a previous write gate signal applied before the write gate signal is applied, a first electrode receiving a first initialization voltage, and a second electrode electrically connected to the first transistor.
