US Patent Application 18116104. GATE DRIVER simplified abstract

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GATE DRIVER

Inventors

Haijung In of Yongin-si (KR)


Minku Lee of Yongin-si (KR)


Seunghee Lee of Yongin-si (KR)


GATE DRIVER - A simplified explanation of the abstract

  • This abstract for appeared for US patent application number 18116104 Titled 'GATE DRIVER'

Simplified Explanation

The abstract describes a stage of a gate driver, which is a device used to control the switching of power transistors. This stage consists of two node controllers: a first node controller and a second node controller.

The first node controller includes a control transistor that is connected between a first node and a second node. This control transistor has two gates, a first gate and a second gate. The first gate is connected to a first voltage input terminal, which receives a voltage at an on-voltage level.

The second node controller includes another control transistor that is connected between a third node and a second voltage input terminal. This control transistor has a first gate connected to the first node and a second gate connected to the second voltage input terminal. The second voltage input terminal receives a voltage at an off-voltage level.

In simpler terms, this stage of the gate driver has two controllers. The first controller controls the switching on of the power transistor, while the second controller controls the switching off. Each controller has a control transistor with multiple gates that receive different voltages to perform their respective functions.


Original Abstract Submitted

A stage of a gate driver includes: a first node controller and a second node controller. The first node controller includes a first control transistor connected between a first node and a second node, and the first control transistor includes a first gate and a second gate that are connected to a first voltage input terminal for receiving a first voltage of an on-voltage level. The second node controller includes a second control transistor connected between a third node and a second voltage input terminal for receiving a second voltage of an off-voltage level, and the second control transistor includes a first gate connected to the first node and a second gate connected to the second voltage input terminal.