US Patent Application 18108117. SELF-SELECTING MEMORY DEVICES simplified abstract

SELF-SELECTING MEMORY DEVICES

Organization Name

SAMSUNG ELECTRONICS CO., LTD.==Inventor(s)==

[[Category:Doyoun Park of Suwon-si (KR)]]

[[Category:Seulji Song of Suwon-si (KR)]]

[[Category:Yoonjong Song of Suwon-si (KR)]]

SELF-SELECTING MEMORY DEVICES - A simplified explanation of the abstract

This abstract first appeared for US patent application 18108117 titled 'SELF-SELECTING MEMORY DEVICES

Simplified Explanation

The abstract describes a self-selecting memory device that includes multiple memory cells stacked vertically on conductive lines.

• The device consists of a first conductive line on a substrate, a first memory cell on the first conductive line, a second conductive line on the first memory cell, a second memory cell on the second conductive line, and a third conductive line on the second memory cell.
• The first memory cell is composed of a first electrode, a first switching memory unit, and a second electrode stacked vertically.
• The second memory cell is composed of a third electrode, a second switching memory unit, and a fourth electrode stacked vertically.
• The first switching memory unit includes a first SSM pattern and a first nitrogen-containing pattern.
• The first SSM pattern is in contact with the upper surface of the first electrode and is made of an OTS material.
• The first nitrogen-containing pattern is in contact with the upper surface of the first SSM pattern and the lower surface of the second electrode. It is made of an OTS material doped with nitrogen.

Original Abstract Submitted

A self-selecting memory device includes a first conductive line on a substrate, a first memory cell on the first conductive line, a second conductive line on the first memory cell, a second memory cell on the second conductive line, and a third conductive line on the second memory cell. The first memory cell includes a first electrode, a first switching memory unit and a second electrode sequentially and vertically stacked. The second memory cell includes a third electrode, a second switching memory unit and a fourth electrode sequentially and vertically stacked. The first switching memory unit includes a first SSM pattern contacting an upper surface of the first electrode and including an OTS material, and a first nitrogen-containing pattern contacting an upper surface of the first SSM pattern and a lower surface of the second electrode and including an OTS material doped with nitrogen.