US Patent Application 18090856. SEMICONDUCTOR PACKAGE AND ELECTRONIC DEVICE INCLUDING THE SAME simplified abstract

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SEMICONDUCTOR PACKAGE AND ELECTRONIC DEVICE INCLUDING THE SAME

Organization Name

Samsung Electronics Co., Ltd.


Inventor(s)

Yunseok Choi of Suwon-si (KR)


Jongbo Shim of Suwon-si (KR)


Heeyoub Kang of Suwon-si (KR)


Sungeun Jo of Suwon-si (KR)


SEMICONDUCTOR PACKAGE AND ELECTRONIC DEVICE INCLUDING THE SAME - A simplified explanation of the abstract

'This abstract first appeared for US patent application 18090856 titled 'SEMICONDUCTOR PACKAGE AND ELECTRONIC DEVICE INCLUDING THE SAME'

Simplified Explanation

This abstract describes a semiconductor package that consists of a package substrate with two mounting regions on its top surface. The first mounting region holds a semiconductor chip, while the second mounting region holds another semiconductor chip and is covered by an interposer substrate. The interposer substrate has conductive connectors that extend from its bottom surface to the top surface of the package substrate, but are spaced apart from the second semiconductor chip. Additionally, there is a third semiconductor chip on the top surface of the interposer substrate. The abstract mentions that the distance between the top surface of the first semiconductor chip and the top surface of the package substrate is greater than the distance between the top surface of the interposer substrate and the top surface of the package substrate.


Original Abstract Submitted

A semiconductor package includes a package substrate with first and second mounting regions at a top surface of the package substrate, a first semiconductor chip disposed on the first mounting region, a second semiconductor chip disposed on the second mounting region, an interposer substrate disposed on the second mounting region and covering the second semiconductor chip, a plurality of conductive connectors extending from a bottom surface of the interposer substrate to the top surface of the package substrate and laterally spaced apart from the second semiconductor chip, and a third semiconductor chip on a top surface of the interposer substrate. A first distance between a top surface of the first semiconductor chip and the top surface of the package substrate is greater than a second distance between the top surface of the interposer substrate and the top surface of the package substrate.