US Patent Application 18077419. SEMICONDUCTOR MEMORY DEVICES simplified abstract

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SEMICONDUCTOR MEMORY DEVICES

Organization Name

Samsung Electronics Co., Ltd.


Inventor(s)

So Hyeon Bae of Suwon-si (KR)

Won Chul Lee of Suwon-si (KR)

Byeong Jun Bae of Suwon-si (KR)

SEMICONDUCTOR MEMORY DEVICES - A simplified explanation of the abstract

This abstract first appeared for US patent application 18077419 titled 'SEMICONDUCTOR MEMORY DEVICES

Simplified Explanation

The patent application describes a semiconductor memory device with a specific gate structure and contact design. Here are the key points:

  • The device has a substrate divided into a cell region and a peripheral region.
  • The gate structure consists of three conductive layers made of different materials, with the first layer being polysilicon.
  • A capping layer is placed on top of the third conductive layer.
  • Each of the conductive layers and the capping layer has a spacer on its sidewall.
  • A first contact is formed through the capping layer and into the third conductive layer.
  • The first contact is in contact with the second conductive layer but separated from the first conductive layer.
  • The first contact has two portions, one in the third conductive layer and another in the capping layer.
  • The width of the first portion in the third conductive layer is wider than the width of the second portion in the capping layer in a horizontal direction.


Original Abstract Submitted

A semiconductor memory device may include a substrate including a cell region and a peripheral region defined around the cell region, and a gate structure which may include sequentially stacked first, second, and third conductive layers including different materials, the first conductive layer including polysilicon. A capping layer may be on the third conductive layer, and a spacer may be on a sidewall of each of the first to third conductive layers and the capping layer. A first contact may extend through the capping layer and into the third conductive layer, with the first contact in contact with the second conductive layer, and separated from the first conductive layer. The first contact may include a first portion in the third conductive layer and a second portion in the capping layer. A width of the first portion may be greater than a width of the second portion in a horizontal direction.