US Patent Application 18072312. SEMICONDUCTOR DEVICE AND ELECTRONIC SYSTEM INCLUDING THE SAME simplified abstract

SEMICONDUCTOR DEVICE AND ELECTRONIC SYSTEM INCLUDING THE SAME

Organization Name

Samsung Electronics Co., Ltd.

Inventor(s)

SEUNGMIN Lee of SUWON-SI (KR)

JUNHYOUNG Kim of SUWON-SI (KR)

YOUNGBUM Woo of SUWON-SI (KR)

JOONSUNG Lim of SUWON-SI (KR)

SEMICONDUCTOR DEVICE AND ELECTRONIC SYSTEM INCLUDING THE SAME - A simplified explanation of the abstract

This abstract first appeared for US patent application 18072312 titled 'SEMICONDUCTOR DEVICE AND ELECTRONIC SYSTEM INCLUDING THE SAME

Simplified Explanation

The patent application describes a semiconductor device that consists of two semiconductor structures.

• The first semiconductor structure includes a substrate, circuit devices, and metal bonding layers.
• The second semiconductor structure includes gate electrodes, channel structures, metal bonding layers, bit lines, and source lines.
• The gate electrodes are stacked in a perpendicular direction to the metal bonding layers.
• The channel structures pass through the gate electrodes and extend in the same perpendicular direction.
• The metal bonding layers connect the first and second semiconductor structures.
• The bit lines are positioned below the channel structures and extend in a direction perpendicular to the gate electrodes.
• The source lines are placed on top of the channel structures and extend in a direction perpendicular to the bit lines.
• The channel structures are located at the intersections of the bit lines and source lines.

Original Abstract Submitted

A semiconductor device includes a first semiconductor structure including a first substrate, circuit devices disposed on the first substrate, and first metal bonding layers disposed on the circuit devices, and a second semiconductor structure including gate electrodes spaced apart from each other and stacked in a first direction, perpendicular to upper surfaces of the first metal bonding layers, channel structures passing through the gate electrodes, extending in the first direction, and respectively including a channel layer, second metal bonding layers disposed below the channel structures and the gate electrodes and connected to the first metal bonding layers, bit lines disposed below the channel structures, extending in a second direction, perpendicular to the first direction, and spaced apart from each other, and source lines disposed on the channel structures, extending in a third direction, perpendicular to the second direction, and spaced apart from each other. The channel structures are respectively disposed in intersection regions in which the bit lines and the source lines intersect each other.