US Patent Application 18052538. WAFER TEST SYSTEM AND OPERATING METHOD THEREOF simplified abstract

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WAFER TEST SYSTEM AND OPERATING METHOD THEREOF

Organization Name

SK hynix Inc.

Inventor(s)

Dong Kil Kim of Icheon-si (KR)

WAFER TEST SYSTEM AND OPERATING METHOD THEREOF - A simplified explanation of the abstract

This abstract first appeared for US patent application 18052538 titled 'WAFER TEST SYSTEM AND OPERATING METHOD THEREOF

Simplified Explanation

The patent application describes a wafer test system that is used to test the electrical functionality of multiple dies on a wafer.

  • The system includes a chuck that holds the wafer and a probe head that inputs a test signal and receives the corresponding test result.
  • A probe card is used to input test signals to the individual dies on the wafer and receive the test results.
  • A sensing device is mounted on the probe card to detect any active state occurring in the wafer during the electrical test.
  • A determination unit receives the test result and the active state information and determines whether each die has failed based on this information.

The innovation in this patent application is the inclusion of a sensing device on the probe card to detect any active state occurring in the wafer during the electrical test. This allows for more accurate determination of whether a die has failed or not.


Original Abstract Submitted

A wafer test system includes a chuck for supporting a wafer including a plurality of dies, a probe head for inputting a test signal for an electrical test to the probe card and receiving an electrical test result corresponding to the test signal, a probe card for inputting test signals to the dies through a plurality of pins and receiving test result, a sensing device mounted on the surface of the probe card, for sensing an active state occurring in the wafer when the electrical test is performed, and a determination unit for receiving the electrical test result and the active state information for the dies and determining whether each of the dies has failed using the result of the electrical test on the wafer and active state information.