US Patent Application 17989944. SEMICONDUCTOR DEVICE simplified abstract

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SEMICONDUCTOR DEVICE

Organization Name

Samsung Electronics Co., Ltd.


Inventor(s)

Deok Han Bae of Suwon-si (KR)


Myung Yoon Um of Suwon-si (KR)


Yu Ri Lee of Suwon-si (KR)


Sun Me Lim of Suwon-si (KR)


Jun Su Jeon of Suwon-si (KR)


SEMICONDUCTOR DEVICE - A simplified explanation of the abstract

This abstract first appeared for US patent application 17989944 titled 'SEMICONDUCTOR DEVICE

Simplified Explanation

The abstract describes a semiconductor device with an isolation structure, fin-shaped patterns, gate electrodes, source/drain contacts, and a wiring structure. Here are the key points of the patent application:

- The semiconductor device includes an isolation structure with two opposite sidewalls. - There are two fin-shaped patterns, one in contact with each sidewall, extending in the same direction. - A gate electrode is placed on the first fin-shaped pattern. - A source/drain contact is formed on both fin-shaped patterns, extending between the gate electrode and the isolation structure. - A wiring structure is connected to the source/drain contact. - The source/drain contact consists of a lower contact that intersects both fin-shaped patterns, an upper contact protruding from the lower contact, and a dummy contact. - The wiring structure is in contact with the upper contact but not with the dummy contact.

In summary, the patent application describes a semiconductor device with a unique configuration of fin-shaped patterns, gate electrodes, source/drain contacts, and wiring structures, providing improved performance and functionality.


Original Abstract Submitted

A semiconductor device includes an isolation structure having first and second sidewalls opposite each other, a first fin-shaped pattern in contact with the first sidewall and extending in the second direction, a second fin-shaped pattern in contact with the second sidewall and extending in the second direction, a first gate electrode on the first fin-shaped pattern, a first source/drain contact on the first and second fin-shaped patterns and extending between the first gate electrode and the element isolation structure, and a wiring structure on and connected to the first source/drain contact, wherein the first source/drain contact includes a lower contact intersecting the first and second fin-shaped patterns, an upper contact protruding from the lower contact, and a dummy contact, the wiring structure being in contact with the upper contact and not with the dummy contact.