US Patent Application 17952008. SEMICONDUCTOR DEVICE FOR PERFORMING DATA ALIGNMENT OPERATION simplified abstract
Contents
SEMICONDUCTOR DEVICE FOR PERFORMING DATA ALIGNMENT OPERATION
Organization Name
Inventor(s)
Young Mok Jeong of Icheon-si Gyeonggi-do (KR)
Min Gyu Park of Icheon-si Gyeonggi-do (KR)
Min Su Park of Icheon-si Gyeonggi-do (KR)
SEMICONDUCTOR DEVICE FOR PERFORMING DATA ALIGNMENT OPERATION - A simplified explanation of the abstract
This abstract first appeared for US patent application 17952008 titled 'SEMICONDUCTOR DEVICE FOR PERFORMING DATA ALIGNMENT OPERATION
Simplified Explanation
The patent application describes a semiconductor device that includes a circuit for generating alignment data from input data.
- The alignment data is generated by aligning latch data from different groups of input data with internal strobe signals.
- The aligned latch data is outputted as first and second alignment data.
- The device also includes a write data generation circuit that generates write data from the alignment data in synchronization with a latch clock.
- The write data is generated during different operation modes of the device.
- The first and second write data are generated from the alignment data during the first operation mode.
- During the second operation mode, only the first write data is generated from the alignment data.
Original Abstract Submitted
A semiconductor device includes an alignment data generation circuit aligning first and second latch data generated from a first group of input data in synchronization with a first internal strobe signal, outputting the aligned first and second latch data as first alignment data, aligning a first and second latch data generated from a second group of the input data in synchronization with a second internal strobe signal, and outputting the aligned first and second latch data as second alignment data. The semiconductor device includes a write data generation circuit generating first and second write data from the first and second alignment data in synchronization with a latch clock after the start of a first operation mode and generating the first and second write data from the first alignment data in synchronization with the latch clock after the start of a second operation mode.
