US Patent Application 17825193. LOW POWER MULTI-LEVEL CELL (MLC) PROGRAMMING IN NON-VOLATILE MEMORY STRUCTURES simplified abstract
LOW POWER MULTI-LEVEL CELL (MLC) PROGRAMMING IN NON-VOLATILE MEMORY STRUCTURES
Organization Name
Inventor(s)
Xiang Yang of Santa Clara CA (US)
Muhammad Masuduzzaman of Chandler AZ (US)
Jiacen Guo of Cupertino CA (US)
LOW POWER MULTI-LEVEL CELL (MLC) PROGRAMMING IN NON-VOLATILE MEMORY STRUCTURES - A simplified explanation of the abstract
This abstract first appeared for US patent application 17825193 titled 'LOW POWER MULTI-LEVEL CELL (MLC) PROGRAMMING IN NON-VOLATILE MEMORY STRUCTURES
Simplified Explanation
The abstract describes a method for programming a memory array of a non-volatile memory structure, specifically a population of MLC NAND-type memory cells. The method involves applying an inhibit condition and a zero voltage condition to the bit lines of the memory array.
- The method is used for programming a memory array of a non-volatile memory structure.
- The memory array consists of MLC NAND-type memory cells.
- The method involves applying an inhibit condition to one or more bit lines of the memory array.
- The method also involves applying a zero voltage condition to one or more bit lines of the memory array.
- The goal is to ensure that less than half of the adjacent bit lines of the memory array experience a voltage swing between the inhibit condition and the zero voltage condition.
Original Abstract Submitted
A method for programming a memory array of a non-volatile memory structure, the memory comprising a population of MLC NAND-type memory cells, wherein the method comprises applying: (1) an inhibit condition to one or more bit lines of the memory array, and (2) a zero voltage condition to one or more bit lines of the memory array such that less than half of the adjacent bit lines of the memory array experience a voltage swing between the inhibit condition and the zero voltage condition.
