US Patent Application 17824330. SEMICONDUCTOR STRUCTURE WITH INTEGRATED PASSIVE DEVICE HAVING OPPOSED SOLDER BUMPS simplified abstract

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SEMICONDUCTOR STRUCTURE WITH INTEGRATED PASSIVE DEVICE HAVING OPPOSED SOLDER BUMPS

Organization Name

Taiwan Semiconductor Manufacturing Company, Ltd.==Inventor(s)==

[[Category:Fong-yuan Chang of Hsinchu County (TW)]]

[[Category:Ho Che Yu of Zhubei City (TW)]]

[[Category:Yu-Hao Chen of Hsinchu City (TW)]]

[[Category:Yii-Chian Lu of Taipei (TW)]]

[[Category:Ching-Yi Lin of Zhubei City (TW)]]

[[Category:Jyh Chwen Frank Lee of Palo Alto CA (US)]]

SEMICONDUCTOR STRUCTURE WITH INTEGRATED PASSIVE DEVICE HAVING OPPOSED SOLDER BUMPS - A simplified explanation of the abstract

This abstract first appeared for US patent application 17824330 titled 'SEMICONDUCTOR STRUCTURE WITH INTEGRATED PASSIVE DEVICE HAVING OPPOSED SOLDER BUMPS

Simplified Explanation

The abstract of the patent application describes a semiconductor device that includes an integrated passive device connected to a redistribution structure using a series of first bumps. The device also has a set of second bumps positioned opposite the first bumps. The first and second bumps are connected thermally and/or electrically, allowing for additional thermal and/or electrical connections within the semiconductor device.

  • The semiconductor device includes an integrated passive device.
  • The integrated passive device is connected to a redistribution structure using a series of first bumps.
  • The device also has a set of second bumps positioned opposite the first bumps.
  • The first and second bumps are connected thermally and/or electrically.
  • The connections enable further thermal and/or electrical connections within the semiconductor device.


Original Abstract Submitted

A semiconductor device includes an integrated passive device coupled to a redistribution structure by a plurality of first bumps, and having a plurality of second bumps disposed opposite the plurality of first bumps, wherein the plurality of first and second bumps are thermally and/or electrically connected, and thus enable further thermal and/or electrical connections within or comprising the semiconductor device.

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