US Patent Application 17820949. INTEGRATED CIRCUIT DEVICES INCLUDING METAL LINES SPACED APART FROM METAL VIAS, AND RELATED FABRICATION METHODS simplified abstract
INTEGRATED CIRCUIT DEVICES INCLUDING METAL LINES SPACED APART FROM METAL VIAS, AND RELATED FABRICATION METHODS
Organization Name
Inventor(s)
Janggeun Lee of Delmar NY (US)
Jaemyung Choi of Niskayuna NY (US)
Wonhyuk Hong of Clifton Park NY (US)
Kang-ill Seo of Albany NY (US)
INTEGRATED CIRCUIT DEVICES INCLUDING METAL LINES SPACED APART FROM METAL VIAS, AND RELATED FABRICATION METHODS - A simplified explanation of the abstract
'This abstract first appeared for US patent application 17820949 titled 'INTEGRATED CIRCUIT DEVICES INCLUDING METAL LINES SPACED APART FROM METAL VIAS, AND RELATED FABRICATION METHODS'
Simplified Explanation
The abstract describes integrated circuit devices and a method of forming them. These devices consist of multiple layers of insulating material and metal components. The devices also include conductive material and metal lines. The abstract does not provide any specific details about the purpose or application of these devices.
Original Abstract Submitted
Integrated circuit devices are provided. An integrated circuit device includes a first insulating layer and a metal via that is in the first insulating layer. The integrated circuit device includes a second insulating layer on the first insulating layer. The integrated circuit device includes a conductive material that is between sidewalls of the second insulating layer and on the metal via. Moreover, the integrated circuit device includes a metal line that is on the conductive material and/or the second insulating layer. Related methods of forming integrated circuit devices are also provided.
