US Patent Application 17729857. MINIMIZING IMPEDANCE TOLERANCES DUE TO MISREGISTRATION simplified abstract
Contents
MINIMIZING IMPEDANCE TOLERANCES DUE TO MISREGISTRATION
Organization Name
Inventor(s)
Sandor Farkas of Round Rock TX (US)
Bhyrav Mutnury of Austin TX (US)
MINIMIZING IMPEDANCE TOLERANCES DUE TO MISREGISTRATION - A simplified explanation of the abstract
- This abstract for appeared for US patent application number 17729857 Titled 'MINIMIZING IMPEDANCE TOLERANCES DUE TO MISREGISTRATION'
Simplified Explanation
The abstract describes a printed circuit board used in an information handling system. This circuit board has two signal vias, which are pathways for electrical signals. Each signal via is surrounded by a keepout object, which is a designated area that prevents other components from interfering with the signal via. The circuit board also has two signal traces, which are conductive paths for carrying electrical signals. These signal traces, one positive and one negative, are located between the keepout objects. Additionally, the width of each signal trace is increased, likely to improve the performance and reliability of the circuit board.
Original Abstract Submitted
A printed circuit board of an information handling system includes a pair of signal vias including a pair of keepout objects. Each one of the keepout objects surrounds one of the signal vias. The printed circuit board includes a pair of signal traces that includes a positive signal trace and a negative signal trace, wherein the pair of signal traces are between the keepout objects, and wherein a width of each of the signal traces is increased.
