US Patent Application 17727131. ENHANCED WRITE PERFORMANCE UTILIZING PROGRAM INTERLEAVE simplified abstract

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ENHANCED WRITE PERFORMANCE UTILIZING PROGRAM INTERLEAVE

Organization Name

Micron Technology, Inc.


Inventor(s)

Daniel J. Hubbard of Boise ID (US)


Roy Leonard of San Jose CA (US)


ENHANCED WRITE PERFORMANCE UTILIZING PROGRAM INTERLEAVE - A simplified explanation of the abstract

  • This abstract for appeared for US patent application number 17727131 Titled 'ENHANCED WRITE PERFORMANCE UTILIZING PROGRAM INTERLEAVE'

Simplified Explanation

The abstract describes a system that consists of a memory sub-system with different types of storage blocks. It includes a cache called single-level cell (SLC) cache, a first storage block called multiple level cell (XLC) storage with a first XLC block, and a second XLC storage with a second XLC block.

In this system, data is written indirectly to the first XLC storage through the SLC cache in a mode called first XLC write mode. Additionally, data is directly written to the second XLC storage in a mode called second XLC write mode.

The system also includes a processing device that performs various operations. These operations involve receiving data from a host system, initiating a write operation to write the data to both the first and second XLC storages, and causing subsets of the data to be alternatively written to the first XLC block in the first XLC write mode and to the second XLC block in the second XLC write mode using page level interleave.


Original Abstract Submitted

A system includes a memory sub-system including a single-level cell (SLC) cache, a first multiple level cell (XLC) storage including a first XLC block, and a second XLC storage including a second XLC block. Data is indirectly written to the first XLC storage via the SLC cache in a first XLC write mode, and data is directly written to the second XLC storage in a second XLC write mode. The system further includes a processing device to perform operations including receiving data from a host system, in response to receiving the data, initiating a write operation to write the data to the first XLC storage and the second XLC storage, and causing subsets of the data to be alternatively written to the first XLC block in the first XLC write mode and to the second XLC block in the second XLC write mode using page level interleave.

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