US Patent Application 17725170. ADAPTIVE MEMORY ERROR DETECTION AND CORRECTION simplified abstract
Contents
ADAPTIVE MEMORY ERROR DETECTION AND CORRECTION
Organization Name
Inventor(s)
DEEPAK KUMAR Agarwal of Bangalore (IN)
Rakesh Gehalot of Bangalore (IN)
ADAPTIVE MEMORY ERROR DETECTION AND CORRECTION - A simplified explanation of the abstract
- This abstract for appeared for US patent application number 17725170 Titled 'ADAPTIVE MEMORY ERROR DETECTION AND CORRECTION'
Simplified Explanation
The abstract describes a method for monitoring and correcting errors in a memory subsystem. The system uses Error Detection and Correction (EDAC) logic, which is initially set to a first level. The number of error corrections made by the EDAC logic using the first level is counted during a specific time period. If the number of error corrections exceeds a certain threshold, the system switches the EDAC logic to a second level.
Original Abstract Submitted
Error detection and correction (EDAC) logic of a memory subsystem may be monitored for error corrections, with the EDAC logic configured to use a first EDAC level. The number of error corrections made by the EDAC logic while using the first EDAC level during a time interval may be determined. The EDAC logic may be switched from using the first EDAC level to using a second EDAC level when the number of error corrections using the first EDAC level during the time interval exceeds a threshold.
