US Patent Application 17719040. SEMICONDUCTOR DEVICE AND METHOD FOR FORMING THE SAME simplified abstract
Contents
SEMICONDUCTOR DEVICE AND METHOD FOR FORMING THE SAME
Organization Name
Taiwan Semiconductor Manufacturing Company, Ltd.
Inventor(s)
Fan-Cheng Lin of Hsinchu City (TW)
Po-Kai Hsiao of Changhua County (TW)
Tsai-Yu Huang of Taoyuan City (TW)
Huicheng Chang of Tainan City (TW)
Yee-Chia Yeo of Hsinchu City (TW)
SEMICONDUCTOR DEVICE AND METHOD FOR FORMING THE SAME - A simplified explanation of the abstract
- This abstract for appeared for US patent application number 17719040 Titled 'SEMICONDUCTOR DEVICE AND METHOD FOR FORMING THE SAME'
Simplified Explanation
This method involves several steps to fabricate a semiconductor device. First, a semiconductor fin is formed on a substrate. Then, an isolation structure is created on the substrate. Next, a layer of metal oxide is deposited over the isolation structure, followed by a layer of oxide. Another layer of metal oxide is then deposited on top. These metal oxide layers have amorphous structures. A chemical mechanism polishing (CMP) process is performed to smooth out the metal oxide layers. After the CMP process, an annealing process is carried out to convert the amorphous structures of the metal oxide layers into crystalline structures. A gate structure is then formed over the semiconductor fin, and source/drain structures are formed on opposite sides of the gate structure.
Original Abstract Submitted
A method includes forming a semiconductor fin protruding over a substrate; forming an isolation structure over the substrate; depositing a first metal oxide layer over the isolation structure; depositing a first oxide layer over the first metal oxide layer; depositing a second metal oxide layer over the first oxide layer, in which the first metal oxide layer and the second metal oxide layer comprise amorphous structures; performing a chemical mechanism polishing (CMP) process to the first metal oxide layer, the first oxide layer, and the second metal oxide layer; after the CMP process is completed, performing an annealing process such that the first metal oxide layer and the second metal oxide layer are transferred from the amorphous structures into crystalline structures; forming a gate structure over the semiconductor fin; and forming source/drain structures over the substrate and on opposite sides of the gate structure.
