US Patent Application 17664887. INTERCONNECT THROUGH GATE CUT FOR STACKED FET DEVICE simplified abstract

INTERCONNECT THROUGH GATE CUT FOR STACKED FET DEVICE

Organization Name

International Business Machines Corporation

Inventor(s)

Ruilong Xie of Niskayuna NY (US)

Albert M. Young of Fishkill NY (US)

Brent A. Anderson of Jericho VT (US)

Julien Frougier of Albany NY (US)

Kangguo Cheng of Schenectady NY (US)

CHANRO Park of CLIFTON PARK NY (US)

INTERCONNECT THROUGH GATE CUT FOR STACKED FET DEVICE - A simplified explanation of the abstract

This abstract first appeared for US patent application 17664887 titled 'INTERCONNECT THROUGH GATE CUT FOR STACKED FET DEVICE

Simplified Explanation

The patent application describes a microelectronic structure that consists of a stacked device region, which includes multiple top devices and multiple bottom devices. Each top device has a top source/drain, and each bottom device has a bottom source/drain. There is also a gate cut region adjacent to the stacked region, and an interconnect is present in the gate cut region. The interconnect is connected to at least two different devices within the stacked device region.

• The microelectronic structure includes a stacked device region with multiple top devices and multiple bottom devices.
• Each top device has a top source/drain, and each bottom device has a bottom source/drain.
• There is a gate cut region located next to the stacked region.
• An interconnect is present in the gate cut region.
• The interconnect is connected to at least two different devices within the stacked device region.

Original Abstract Submitted

A microelectronic structure including a stacked device region, where stacked device region is comprised of a plurality of top devices and a plurality of bottom devices. Each of the plurality of top devices includes at least one top source/drain. Each of the plurality of bottom devices includes at least one bottom source/drain. A gate cut region located adjacent to the stacked region and an interconnect located in the gate cut region. The interconnect is connected to at least two different devices located in the stacked device region.