US Patent Application 17661029. DIE EDGE PROTECTION TO ELIMINATE DIE CHIPPING simplified abstract
Contents
DIE EDGE PROTECTION TO ELIMINATE DIE CHIPPING
Organization Name
Inventor(s)
Sameer Sunil Vadhavkar of San Diego CA (US)
Changhan Hobie Yun of San Diego CA (US)
Paragkumar Ajaybhai Thadesar of San Diego CA (US)
Daniel Daeik Kim of San Diego CA (US)
DIE EDGE PROTECTION TO ELIMINATE DIE CHIPPING - A simplified explanation of the abstract
- This abstract for appeared for US patent application number 17661029 Titled 'DIE EDGE PROTECTION TO ELIMINATE DIE CHIPPING'
Simplified Explanation
The device described in the abstract is designed to protect a die, which is a small piece of a larger wafer, from damage. A protection layer is applied to the die before it is cut from the wafer. This layer helps prevent chips and cracks from occurring during the cutting process and also provides ongoing protection after the cutting is complete.
Original Abstract Submitted
Disclosed is a device that includes a die and a protection layer surrounding the die. The protection layer is applied at a backend process prior to dicing a wafer to individual dies. The protection layer protects the die from chips and cracks during and after dicing the wafer.
