US Patent Application 17659735. REDUCTION OF CROSSTALK AND IMPEDANCE SENSITIVITY FOR A MICROSTRIP IN A PRINTED CIRCUIT BOARD OF AN INFORMATION HANDLING SYSTEM simplified abstract

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REDUCTION OF CROSSTALK AND IMPEDANCE SENSITIVITY FOR A MICROSTRIP IN A PRINTED CIRCUIT BOARD OF AN INFORMATION HANDLING SYSTEM

Organization Name

Dell Products L.P.


Inventor(s)

Douglas S. Winterberg of Austin TX (US)


Wan-Ju Kuo of Xindian District (TW)


Bhyrav M. Mutnury of Austin TX (US)


REDUCTION OF CROSSTALK AND IMPEDANCE SENSITIVITY FOR A MICROSTRIP IN A PRINTED CIRCUIT BOARD OF AN INFORMATION HANDLING SYSTEM - A simplified explanation of the abstract

  • This abstract for appeared for US patent application number 17659735 Titled 'REDUCTION OF CROSSTALK AND IMPEDANCE SENSITIVITY FOR A MICROSTRIP IN A PRINTED CIRCUIT BOARD OF AN INFORMATION HANDLING SYSTEM'

Simplified Explanation

The abstract describes a printed circuit board (PCB) that includes several layers. One of the layers is a ground reference layer, which provides a reference point for electrical signals. Another layer is a pre-preg layer, which has a surface. On this surface, there are two transmission lines positioned a certain distance apart. These transmission lines are used to carry electrical signals. Surrounding the transmission lines is a solder mask layer, which has a certain thickness and a specific dielectric constant. The thickness and dielectric constant of the solder mask layer are chosen in such a way that the electric fields associated with the first transmission line converge within a certain distance from the line. This convergence helps ensure the proper functioning of the PCB.


Original Abstract Submitted

A printed circuit board (PCB), including: a ground reference layer; a pre-impregnated (pre-preg) layer having a surface; a first transmission line positioned on the surface; a second transmission line positioned on the surface spaced-apart from the first transmission line a first distance; and a solder mask layer positioned on the surface of the pre-preg layer and surrounding the first transmission line and the second transmission line, the solder mask layer having a thickness and a dielectric constant, wherein the thickness of the solder mask layer and a value of the dielectric constant of the solder mask layer cause convergence of electric fields associated with the first transmission line to be within a second distance from the first transmission line.