Taiwan semiconductor manufacturing company, ltd. (20240113119). HIGH PERFORMANCE MOSFETS HAVING VARYING CHANNEL STRUCTURES simplified abstract
Contents
- 1 HIGH PERFORMANCE MOSFETS HAVING VARYING CHANNEL STRUCTURES
- 1.1 Organization Name
- 1.2 Inventor(s)
- 1.3 HIGH PERFORMANCE MOSFETS HAVING VARYING CHANNEL STRUCTURES - A simplified explanation of the abstract
- 1.4 Simplified Explanation
- 1.5 Potential Applications
- 1.6 Problems Solved
- 1.7 Benefits
- 1.8 Potential Commercial Applications
- 1.9 Possible Prior Art
- 1.10 Original Abstract Submitted
HIGH PERFORMANCE MOSFETS HAVING VARYING CHANNEL STRUCTURES
Organization Name
taiwan semiconductor manufacturing company, ltd.
Inventor(s)
Ching-Wei Tsai of Hsinchu (TW)
Jiun-Jia Huang of Beigang Township (TW)
Kuan-Lun Cheng of Hsinchu (TW)
Chi-Hsing Hsu of New Taipei City (TW)
HIGH PERFORMANCE MOSFETS HAVING VARYING CHANNEL STRUCTURES - A simplified explanation of the abstract
This abstract first appeared for US patent application 20240113119 titled 'HIGH PERFORMANCE MOSFETS HAVING VARYING CHANNEL STRUCTURES
Simplified Explanation
The present disclosure describes a method for the formation of gate-all-around nano-sheet FETs with tunable performance. The method involves creating vertical structures with multilayer nano-sheet stacks, disposing a sacrificial gate structure, depositing an isolation layer, etching the sacrificial gate structure, removing second nano-sheet layers, and forming a metal gate structure around the suspended first nano-sheet layers.
- Vertical structures with multilayer nano-sheet stacks
- Sacrificial gate structure and isolation layer
- Etching and removing layers to form suspended nano-sheets
- Metal gate structure surrounding the suspended nano-sheets
Potential Applications
The technology can be applied in the semiconductor industry for the development of high-performance transistors, particularly in the field of nanoelectronics.
Problems Solved
This method addresses the need for improved performance and tunability in FETs by utilizing gate-all-around nano-sheet structures.
Benefits
- Enhanced performance of FETs - Tunable characteristics - Potential for miniaturization and increased efficiency in electronic devices
Potential Commercial Applications
"Optimizing Performance of Gate-All-Around Nano-Sheet FETs for Semiconductor Industry"
Possible Prior Art
Prior art may include methods for fabricating nanostructures in semiconductor devices, such as nanowires or nanotubes.
=== What are the specific materials used in the fabrication process? The article does not provide detailed information on the specific materials used in the fabrication process.
=== Are there any limitations to the tunability of the FETs achieved through this method? The article does not mention any limitations to the tunability of the FETs achieved through this method.
Original Abstract Submitted
the present disclosure describes a method for the formation of gate-all-around nano-sheet fets with tunable performance. the method includes disposing a first and a second vertical structure with different widths over a substrate, where the first and the second vertical structures have a top portion comprising a multilayer nano-sheet stack with alternating first and second nano-sheet layers. the method also includes disposing a sacrificial gate structure over the top portion of the first and second vertical structures; depositing an isolation layer over the first and second vertical structures so that the isolation layer surrounds a sidewall of the sacrificial gate structure; etching the sacrificial gate structure to expose each multilayer nano-sheet stack from the first and second vertical structures; removing the second nano-sheet layers from each exposed multilayer nano-sheet stack to form suspended first nano-sheet layers; forming a metal gate structure to surround the suspended first nano-sheet layers.
