Taiwan semiconductor manufacturing company, ltd. (20240112928). TRIMMING METHOD simplified abstract
Contents
TRIMMING METHOD
Organization Name
taiwan semiconductor manufacturing company, ltd.
Inventor(s)
Chun-Hung Liao of Taichung (TW)
Huang-Lin Chao of Hillsboro OR (US)
TRIMMING METHOD - A simplified explanation of the abstract
This abstract first appeared for US patent application 20240112928 titled 'TRIMMING METHOD
Simplified Explanation
The patent application describes a method for trimming a wafer to reduce its thickness while maintaining structural integrity. The method involves bonding two wafers together, performing an edge trimming process to remove a portion of the substrate, and then thinning the remaining portion through a grinding process.
- Bonding of two wafers
- Edge trimming process to remove a portion of the substrate
- Grinding process to thin the remaining portion of the substrate
Potential Applications
The technology described in the patent application could be applied in the semiconductor industry for the manufacturing of integrated circuits and other electronic devices. It could also be used in the production of solar cells and other thin-film devices.
Problems Solved
This technology solves the problem of reducing the thickness of a wafer without compromising its structural integrity. It allows for precise trimming of the substrate while maintaining the integrity of the device layer.
Benefits
The benefits of this technology include improved efficiency in wafer manufacturing processes, increased yield of usable wafers, and the ability to produce thinner and lighter electronic devices.
Potential Commercial Applications
The technology could be commercially applied in semiconductor manufacturing companies, solar cell manufacturers, and other industries that require thin-film devices. The section title could be: "Commercial Applications of Wafer Trimming Technology in Semiconductor Industry"
Possible Prior Art
One possible prior art for this technology could be the use of laser cutting or chemical etching processes to trim wafers in the semiconductor industry. These methods may not be as precise or efficient as the method described in the patent application.
Unanswered Questions
How does this technology compare to existing wafer trimming methods in terms of cost and efficiency?
The article does not provide a direct comparison between this technology and existing wafer trimming methods. Further research or testing would be needed to determine the cost-effectiveness and efficiency of this new method compared to traditional techniques.
What are the potential limitations or challenges in implementing this technology on an industrial scale?
The article does not address any potential limitations or challenges in implementing this technology on an industrial scale. Factors such as scalability, equipment requirements, and process control could present challenges that need to be addressed before widespread adoption of this technology.
Original Abstract Submitted
a trimming method is provided. the trimming method includes the following steps. a first wafer including a substrate and a device layer over a first side of the substrate is provided. the first wafer is bonded to a second wafer with the first side of the substrate facing toward the second wafer. an edge trimming process is performed to remove a trimmed portion of the substrate from a second side opposite to the first side vertically downward toward the first side in a first direction along a perimeter of the substrate, wherein the edge trimming process results in the substrate having a flange pattern laterally protruding from the device layer and laterally surrounding an untrimmed portion of the substrate along a second direction perpendicular to the first direction. a grinding process is performed on the untrimmed portion of the substrate from the second side to thin the untrimmed portion of the substrate to a reduced thickness in the first direction, wherein the grinding process results in the reduced thickness being greater than a thickness of the flange pattern.
