Taiwan semiconductor manufacturing company, ltd. (20240105779). INTEGRATED CIRCUIT STRUCTURE AND METHOD FOR FORMING THE SAME simplified abstract
Contents
- 1 INTEGRATED CIRCUIT STRUCTURE AND METHOD FOR FORMING THE SAME
- 1.1 Organization Name
- 1.2 Inventor(s)
- 1.3 INTEGRATED CIRCUIT STRUCTURE AND METHOD FOR FORMING THE SAME - A simplified explanation of the abstract
- 1.4 Simplified Explanation
- 1.5 Potential Applications
- 1.6 Problems Solved
- 1.7 Benefits
- 1.8 Potential Commercial Applications
- 1.9 Possible Prior Art
- 1.10 Unanswered Questions
- 1.11 Original Abstract Submitted
INTEGRATED CIRCUIT STRUCTURE AND METHOD FOR FORMING THE SAME
Organization Name
taiwan semiconductor manufacturing company, ltd.
Inventor(s)
Shih-Yen Lin of New Taipei City (TW)
Che-Jia Chang of Taichung City (TW)
INTEGRATED CIRCUIT STRUCTURE AND METHOD FOR FORMING THE SAME - A simplified explanation of the abstract
This abstract first appeared for US patent application 20240105779 titled 'INTEGRATED CIRCUIT STRUCTURE AND METHOD FOR FORMING THE SAME
Simplified Explanation
The method described in the abstract involves depositing two graphene layers over a substrate, with the second layer being deposited at a lower temperature and higher pressure than the first layer. A gate structure is then formed over the second graphene layer, followed by the formation of source/drain contacts connected to both graphene layers.
- First deposition process: Forming a first graphene layer over a substrate under a specific temperature and pressure.
- Second deposition process: Forming a second graphene layer over the first layer at a lower temperature and higher pressure.
- Gate structure formation: Creating a gate structure over the second graphene layer.
- Source/drain contacts: Forming contacts on opposite sides of the gate structure connected to both graphene layers.
Potential Applications
The technology described in this patent application could be applied in the development of advanced electronic devices, such as transistors and sensors.
Problems Solved
This technology addresses the challenge of efficiently depositing multiple graphene layers with different properties on a substrate for electronic applications.
Benefits
The method offers a precise and controlled way to create layered graphene structures, which can enhance the performance and functionality of electronic devices.
Potential Commercial Applications
"Advanced Graphene Layer Deposition Method for Electronic Devices"
Possible Prior Art
There may be prior art related to methods for depositing graphene layers on substrates for electronic applications.
Unanswered Questions
How does the temperature and pressure affect the properties of the graphene layers?
The article does not delve into the specific effects of temperature and pressure on the characteristics of the graphene layers.
Are there any limitations to the scalability of this deposition method?
The scalability of the method for depositing multiple graphene layers on a larger scale is not discussed in the article.
Original Abstract Submitted
a method includes performing a first deposition process to form a first graphene layer over a substrate, the first deposition process being performed under a first temperature and a first pressure; performing a second deposition process to form a second graphene layer over the first graphene layer, the second deposition process being performed under a second temperature and a second pressure, in which the first temperature is higher than the second temperature, and the first pressure is lower than the second pressure; forming a gate structure over the second graphene layer; and forming source/drain contacts on opposite sides of the gate structure and electrically connected to the first and second graphene layers.
