Taiwan semiconductor manufacturing co., ltd. (20240128157). Semiconductor Package and Method of Manufacturing the Same simplified abstract
Contents
- 1 Semiconductor Package and Method of Manufacturing the Same
- 1.1 Organization Name
- 1.2 Inventor(s)
- 1.3 Semiconductor Package and Method of Manufacturing the Same - A simplified explanation of the abstract
- 1.4 Simplified Explanation
- 1.5 Potential Applications
- 1.6 Problems Solved
- 1.7 Benefits
- 1.8 Potential Commercial Applications
- 1.9 Possible Prior Art
- 1.10 Original Abstract Submitted
Semiconductor Package and Method of Manufacturing the Same
Organization Name
taiwan semiconductor manufacturing co., ltd.
Inventor(s)
Chin-Chuan Chang of Zhudong Township (TW)
Semiconductor Package and Method of Manufacturing the Same - A simplified explanation of the abstract
This abstract first appeared for US patent application 20240128157 titled 'Semiconductor Package and Method of Manufacturing the Same
Simplified Explanation
The method described in the patent application involves forming a set of through-vias in a substrate, attaching connectors on both sides of the substrate, thinning the substrate to expose the through-vias, bonding a device die to the connectors, and then singulating the substrate into multiple packages.
- Through-vias are partially penetrating a thickness of the substrate.
- Connectors are formed on both sides of the substrate.
- The substrate is thinned to expose the through-vias.
- A device die is bonded to the connectors.
- The substrate is then singulated into multiple packages.
Potential Applications
The technology described in this patent application could be applied in the semiconductor industry for packaging and interconnection purposes.
Problems Solved
This technology solves the problem of efficiently connecting a device die to a substrate and then singulating the substrate into multiple packages.
Benefits
The benefits of this technology include improved packaging efficiency, enhanced device performance, and cost-effectiveness in manufacturing processes.
Potential Commercial Applications
The potential commercial applications of this technology could be in the production of integrated circuits, microprocessors, and other electronic devices.
Possible Prior Art
One possible prior art for this technology could be the use of through-vias in semiconductor packaging processes.
Unanswered Questions
How does this technology compare to traditional packaging methods in terms of cost and efficiency?
This article does not provide a direct comparison between this technology and traditional packaging methods.
What are the specific materials and processes involved in forming the through-vias and connectors?
The article does not delve into the specific materials and processes used in forming the through-vias and connectors.
Original Abstract Submitted
a method includes forming a set of through-vias in a substrate, the set of through-vias partially penetrating a thickness of the substrate. first connectors are formed over the set of through-vias on a first side of the substrate. the first side of the substrate is attached to a carrier. the substrate is thinned from the second side to expose the set of through-vias. second connectors are formed over the set of through-vias on the second side of the substrate. a device die is bonded to the second connectors. the substrate is singulated into multiple packages.
