Taiwan Semiconductor Manufacturing Co., Ltd. patent applications published on October 5th, 2023
Summary of the patent applications from Taiwan Semiconductor Manufacturing Co., Ltd. on October 5th, 2023
Taiwan Semiconductor Manufacturing Co., Ltd. has recently filed patents for various semiconductor devices and methods. These patents cover a range of technologies and applications, including device structures, circuit designs, and fabrication methods. Here is a summary of the recent patents filed by the organization:
- Patent 1: This patent describes a device with multiple layers, including a substrate, dielectric layers, electrodes, and buffer layers. The device's purpose and specific details are not provided in the abstract.
- Patent 2: This patent describes a circuit used for selecting between two voltage supplies. The circuit includes switches and control switches that receive control signals and voltage supplies, allowing for selective output of the voltage supplies based on the control signal.
- Patent 3: This patent describes a device with vertically stacked nanostructures on a semiconductor substrate. The device also includes source/drain regions and a gate structure surrounding the nanostructures. The gate structure consists of a gate dielectric layer, a metal carbide layer, and a gate fill material.
- Patent 4: This patent describes a semiconductor device with a fin structure, source/drain regions, and a gate structure. The gate structure includes a gate stack and a gate capping structure made up of conductive and insulating gate caps. The device also includes a first contact structure located over the gate stack.
- Patent 5: This patent describes a semiconductor device with multiple layers of semiconductor material stacked on top of each other. The device includes gate structures, high-k dielectric layers, gate spacers, and source/drain epitaxial regions. Notably, the top position of the high-k dielectric layer is lower than the top positions of the gate spacers.
- Patent 6: This patent describes a semiconductor device with two layers of gate dielectric material, each doped with a dipole dopant. The first layer has a higher concentration and deeper concentration peak compared to the second layer. The device also includes two gate electrodes with the same width.
- Patent 7: This patent describes a device with a nanostructure on a substrate and a source/drain region consisting of two epitaxial layers. The first layer covers one side of the nanostructure and has a specific dopant concentration, while the second layer covers the rounded convex shape of the first layer with a different dopant concentration.
- Patent 8: This patent describes an optical device with isolation structures placed within a substrate. The device includes metal structures surrounded by dielectric layers, located on the surfaces of the isolation structures.
- Patent 9: This patent describes a semiconductor device with two semiconductor structures, one made of silicon and the other embedded within it. The second structure has convex and concave portions, with the concave portion having various shapes. The second structure is made of germanium, elements from group III or group V of the periodic table, or a combination of these materials.
- Patent 10: This patent describes a method for organizing and connecting transistors in a cell. The cell has active areas separated in one direction and two gates crossing the active areas in another direction. Conductive lines connect the terminals of the transistors, and the method involves turning off a specific transistor to disconnect its source/drain terminal from another transistor's source/drain terminal.
Notable applications:
- Semiconductor device with vertically stacked nanostructures
- Circuit for selecting between voltage supplies
- Semiconductor device with gate capping structure
- Method for organizing and connecting transistors in a cell
- Optical device with isolation structures
Contents
- 1 Patent applications for Taiwan Semiconductor Manufacturing Co., Ltd. on October 5th, 2023
- 1.1 INTEGRATED CIRCUIT PACKAGE AND METHOD OF FORMING SAME (17812530)
- 1.2 EXTREME ULTRAVIOLET MASK AND METHOD FOR FORMING THE SAME (17744567)
- 1.3 High-Density Memory Cells and Layouts Thereof (17664465)
- 1.4 WORK FUNCTION TUNING IN SEMICONDUCTOR DEVICES (17807513)
- 1.5 Varying Temperature Anneal for Film and Structures Formed Thereby (18332056)
- 1.6 Gate Structure Passivating Species Drive-In Method and Structure Formed Thereby (18330885)
- 1.7 Semiconductor Device and Methods of Forming the Same (17711885)
- 1.8 Integrated Circuit Package and Method of Forming Thereof (18329302)
- 1.9 SYSTEMS AND METHODS FOR AUTOMATED PROCESSING PORTS (18206544)
- 1.10 Metal Loss Prevention Using Implantation (18330466)
- 1.11 Semiconductor Device and Method of Manufacture (18331387)
- 1.12 Gate Structure of a Semiconductor Device and Method of Forming Same (18314200)
- 1.13 ETCHING APPARATUS AND METHOD (18328656)
- 1.14 High Efficiency Heat Dissipation Using Thermal Interface Material Film (18328387)
- 1.15 DEVICE WITH BACKSIDE POWER RAIL AND METHOD (17882339)
- 1.16 NON-DMSO STRIPPER FOR ADVANCE PACKAGE METAL PLATING PROCESS (17827415)
- 1.17 Semiconductor Devices and Methods of Manufacture (17740618)
- 1.18 PREVENTION OF METAL PAD CORROSION DUE TO EXPOSURE TO HALOGEN (18329128)
- 1.19 Multi-Bump Connection to Interconnect Structure and Manufacturing Method Thereof (18327252)
- 1.20 INTEGRATED CIRCUIT PACKAGES HAVING ADHESION LAYERS FOR THROUGH VIAS (18330616)
- 1.21 SEMICONDUCTOR DEVICE AND METHOD HAVING HIGH-KAPPA BONDING LAYER (18151160)
- 1.22 SEMICONDUCTOR DEVICE AND METHOD (17656935)
- 1.23 INTEGRATED CIRCUIT (18331011)
- 1.24 SEMICONDUCTOR DEVICE (18329218)
- 1.25 ISOLATION STRUCTURES IN IMAGE SENSORS (17879556)
- 1.26 Source/Drain Regions of Semiconductor Device and Methods of Forming the Same (17712965)
- 1.27 Semiconductor Device having Doped Gate Dielectric Layer and Method for Forming the Same (18152601)
- 1.28 SEMICONDUCTOR DEVICE WITH GATE DIELECTRIC FORMED USING SELECTIVE DEPOSITION (18324636)
- 1.29 Gate Capping Structures In Semiconductor Devices (18206831)
- 1.30 TRANSISTOR GATE STRUCTURES AND METHODS OF FORMING THEREOF (17833348)
- 1.31 VOLTAGE SUPPLY SELECTION CIRCUIT (18330492)
- 1.32 Phase-Change Memory and Method of Forming Same (18321843)
Patent applications for Taiwan Semiconductor Manufacturing Co., Ltd. on October 5th, 2023
INTEGRATED CIRCUIT PACKAGE AND METHOD OF FORMING SAME (17812530)
Inventor Chen-Hua Yu
EXTREME ULTRAVIOLET MASK AND METHOD FOR FORMING THE SAME (17744567)
Inventor Yun-Yue LIN
High-Density Memory Cells and Layouts Thereof (17664465)
Inventor Jen-Chieh Liu
WORK FUNCTION TUNING IN SEMICONDUCTOR DEVICES (17807513)
Inventor Hsin-Yi LEE
Varying Temperature Anneal for Film and Structures Formed Thereby (18332056)
Inventor Shu Ling Liao
Gate Structure Passivating Species Drive-In Method and Structure Formed Thereby (18330885)
Inventor Hsiao-Kuan Wei
Semiconductor Device and Methods of Forming the Same (17711885)
Inventor Bor Chiuan Hsieh
Integrated Circuit Package and Method of Forming Thereof (18329302)
Inventor Hsien-Wei Chen
SYSTEMS AND METHODS FOR AUTOMATED PROCESSING PORTS (18206544)
Inventor Tsung-Sheng KUO
Metal Loss Prevention Using Implantation (18330466)
Inventor Li-Chieh Wu
Semiconductor Device and Method of Manufacture (18331387)
Inventor Chun-Yen Peng
Gate Structure of a Semiconductor Device and Method of Forming Same (18314200)
Inventor Shahaji B. More
ETCHING APPARATUS AND METHOD (18328656)
Inventor Bo-Ting LIAO
High Efficiency Heat Dissipation Using Thermal Interface Material Film (18328387)
Inventor Chih-Hao Chen
DEVICE WITH BACKSIDE POWER RAIL AND METHOD (17882339)
Inventor Yun Ju FAN
NON-DMSO STRIPPER FOR ADVANCE PACKAGE METAL PLATING PROCESS (17827415)
Inventor Tzu-Yang LIN
Semiconductor Devices and Methods of Manufacture (17740618)
Inventor Chen-Yu Tsai
PREVENTION OF METAL PAD CORROSION DUE TO EXPOSURE TO HALOGEN (18329128)
Inventor Chih-Fan Huang
Multi-Bump Connection to Interconnect Structure and Manufacturing Method Thereof (18327252)
Inventor Tsung-Yen Lee
INTEGRATED CIRCUIT PACKAGES HAVING ADHESION LAYERS FOR THROUGH VIAS (18330616)
Inventor Hung-Chun Cho
SEMICONDUCTOR DEVICE AND METHOD HAVING HIGH-KAPPA BONDING LAYER (18151160)
Inventor Che Chi SHIH
SEMICONDUCTOR DEVICE AND METHOD (17656935)
Inventor Kai-Qiang Wen
INTEGRATED CIRCUIT (18331011)
Inventor Guo-Huei WU
SEMICONDUCTOR DEVICE (18329218)
Inventor Zong-Jie WU
ISOLATION STRUCTURES IN IMAGE SENSORS (17879556)
Inventor Cheng-Ying Ho
Source/Drain Regions of Semiconductor Device and Methods of Forming the Same (17712965)
Inventor Yung-Chun Yang
Semiconductor Device having Doped Gate Dielectric Layer and Method for Forming the Same (18152601)
Inventor Yao-Teng Chuang
SEMICONDUCTOR DEVICE WITH GATE DIELECTRIC FORMED USING SELECTIVE DEPOSITION (18324636)
Inventor Tung-Ying LEE
Gate Capping Structures In Semiconductor Devices (18206831)
Inventor Chung-Liang CHENG
TRANSISTOR GATE STRUCTURES AND METHODS OF FORMING THEREOF (17833348)
Inventor Hsin-Yi Lee
VOLTAGE SUPPLY SELECTION CIRCUIT (18330492)
Inventor Chia-Chen KUO
Phase-Change Memory and Method of Forming Same (18321843)
Inventor Jau-Yi Wu