Taiwan Semiconductor Manufacturing Co., Ltd. patent applications published on March 21st, 2024
Summary of the patent applications from Taiwan Semiconductor Manufacturing Co., Ltd. on March 21st, 2024
Taiwan Semiconductor Manufacturing Co., Ltd. has recently filed patents for innovative methods in fabricating T-shaped bottom electrode structures for Magnetic Tunnel Junction (MTJ) devices, optimizing the performance of piezoelectric devices, and forming semiconductor structures with MTJs and conductive capping layers. These patents aim to enhance memory device performance, improve the durability and reliability of semiconductor structures, and optimize the functionality of piezoelectric devices.
Notable applications of these patents include:
- Development of advanced memory devices such as MRAM and non-volatile magnetic memory
- Magnetic storage devices, sensors, and spintronics devices
- Energy harvesting, ultrasonic cleaning, and precision motion control systems
These technologies offer benefits such as enhanced memory device performance, increased efficiency in data storage and processing, improved reliability of semiconductor structures, and optimized performance of piezoelectric devices. The potential commercial applications span across industries like data storage, electronics manufacturing, aerospace, medical devices, and automotive sectors.
Contents
- 1 Patent applications for Taiwan Semiconductor Manufacturing Co., Ltd. on March 21st, 2024
- 1.1 Semiconductor Device, Method and Machine of Manufacture (18515842)
- 1.2 METHOD OF TESTING AN INTEGRATED CIRCUIT AND TESTING SYSTEM (18521432)
- 1.3 CIRCUIT TEST STRUCTURE AND METHOD OF USING (18517260)
- 1.4 PHOTONIC SEMICONDUCTOR-ON-INSULATOR (SOI) SUBSTRATE AND METHOD FOR FORMING THE PHOTONIC SOI SUBSTRATE (18149260)
- 1.5 Packages With Photonic Engines and Method of Forming the Same (18151044)
- 1.6 PHOTOMASK INCLUDING FIDUCIAL MARK AND METHOD OF MAKING A PHOTOMASK (18522942)
- 1.7 PELLICLE FOR EUV LITHOGRAPHY MASKS AND METHODS OF MANUFACTURING THEREOF (18133945)
- 1.8 PELLICLE FOR AN EUV LITHOGRAPHY MASK AND A METHOD OF MANUFACTURING THEREOF (18516630)
- 1.9 DATA SEQUENCING CIRCUIT AND METHOD (18524587)
- 1.10 SIMULATION MODEL AUTHENTICATION (18171384)
- 1.11 ARRANGEMENT OF SOURCE OR DRAIN CONDUCTORS OF TRANSISTOR (18522906)
- 1.12 METHOD OF MAKING INTEGRATED CIRCUIT WITH ASYMMETRIC MIRRORED LAYOUT ANALOG CELLS (18522888)
- 1.13 DEVICES WITH TRACK-BASED FILL (TBF) METAL PATTERNING (18526324)
- 1.14 MEMORY DEVICE (18170109)
- 1.15 MEMORY CIRCUIT AND METHOD OF OPERATING SAME (18521476)
- 1.16 MEMORY CELL AND METHOD OF OPERATING THE SAME (18518736)
- 1.17 MEMORY DEVICE SENSE AMPLIFIER CONTROL (18158108)
- 1.18 MEMORY CIRCUIT AND METHOD OF OPERATING SAME (18522564)
- 1.19 SEMICONDUCTOR PROCESSING TOOL AND METHODS OF OPERATION (18162274)
- 1.20 METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE (18123095)
- 1.21 PHOTO MASK AND LITHOGRAPHY METHOD USING THE SAME (18527024)
- 1.22 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF (18153571)
- 1.23 METAL OXIDE LAYERED STRUCTURE AND METHODS OF FORMING THE SAME (18523457)
- 1.24 SEMICONDUCTOR DEVICE HAVING METAL GATE AND POLY GATE (18527151)
- 1.25 CLEANING PROCESS FOR SOURCE/DRAIN EPITAXIAL STRUCTURES (18516431)
- 1.26 HETEROGENEOUS BONDING STRUCTURE AND METHOD FORMING SAME (18521284)
- 1.27 Wafer Positioning Method and Apparatus (18521314)
- 1.28 STRUCTURES WITH CONVEX CAVITY BOTTOMS (18155926)
- 1.29 CONTACT STRUCTURE OF A SEMICONDUCTOR DEVICE (18519862)
- 1.30 DEVICE WITH THROUGH VIA AND RELATED METHODS (18172240)
- 1.31 SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING THEREOF (18524242)
- 1.32 Footing Removal in Cut-Metal Process (18521140)
- 1.33 INTEGRATED CIRCUIT DEVICE (18526385)
- 1.34 INTEGRATED CIRCUIT, SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME (18152154)
- 1.35 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME (18516969)
- 1.36 Fan-Out Stacked Package and Methods of Making the Same (18152539)
- 1.37 SEMICONDUCTOR PACKAGE (18522601)
- 1.38 SEMICONDUCTOR PACKAGE FIXTURE AND METHODS OF MANUFACTURING (18154329)
- 1.39 PACKAGE STRUCTURE HAVING THERMOELECTRIC COOLER (18152131)
- 1.40 SEMICONDUCTOR DEVICE INCLUDING INSULATING STRUCTURE SURROUNDING THROUGH VIA AND METHOD FOR FORMING THE SAME (18155912)
- 1.41 MEHTOD OF MAKING SEMICONDUCTOR DEVICE HAVING SELF-ALIGNED INTERCONNECT STRUCTURE (18517298)
- 1.42 INTEGRATED CIRCUIT DIE WITH MEMORY MACRO INCLUDING THROUGH-SILICON VIA AND METHOD OF FORMING THE SAME (18524668)
- 1.43 SEMICONDUCTOR PACKAGE AND MANUFACTURING METHOD THEREOF (18522271)
- 1.44 SEMICONDUCTOR DIE PACKAGE WITH CONDUCTIVE LINE CRACK PREVENTION DESIGN (18513866)
- 1.45 PACKAGE STRUCTURE (18186209)
- 1.46 EXTENDED VIA CONNECT FOR PIXEL ARRAY (18149284)
- 1.47 SEMICONDUCTOR DEVICE STRUCTURE WITH CONDUCTIVE BUMPS (18522622)
- 1.48 MODIFIED FUSE STRUCTURE AND METHOD OF USE (18524621)
- 1.49 SEMICONDUCTOR DEVICE INCLUDING PARALLEL CONFIGURATION (18519513)
- 1.50 DIAGONAL BACKSIDE POWER AND SIGNAL ROUTING FOR AN INTEGRATED CIRCUIT (18517706)
- 1.51 SEMICONDUCTOR DEVICE AND METHOD (18522980)
- 1.52 SEMICONDUCTOR DEVICES WITH BACKSIDE ROUTING AND METHOD OF FORMING SAME (18526445)
- 1.53 SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SAME (18152777)
- 1.54 Semiconductor Device and Method of Manufacture (18520958)
- 1.55 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURE (18521711)
- 1.56 PACKAGE STRUCTURE (18520971)
- 1.57 BOND HEAD WITH ELASTIC MATERIAL AROUND PERIMETER TO IMPROVE BONDING QUALITY (18166116)
- 1.58 SEMICONDUCTOR DEVICE AND METHOD (18526057)
- 1.59 Adding Sealing Material to Wafer edge for Wafer Bonding (18151663)
- 1.60 PACKAGE STRUCTURE AND METHOD OF MANUFACTURING THE SAME (18520467)
- 1.61 INTEGRATED CIRCUIT PACKAGE AND METHOD (18149806)
- 1.62 SEMICONDUCTOR STRUCTURE, STACKED STRUCTURE, AND MANUFACTURING METHOD THEREOF (18152141)
- 1.63 SEMICONDUCTOR DEVICE, METHOD OF AND SYSTEM FOR MANUFACTURING SEMICONDUCTOR DEVICE (18519486)
- 1.64 ACTIVE ZONES WITH OFFSET IN SEMICONDUCTOR CELL (18523023)
- 1.65 SEMICONDUCTOR DEVICE INCLUDING SOURCE/DRAIN CONTACT HAVING HEIGHT BELOW GATE STACK (18526395)
- 1.66 ESD STRUCTURE (18520998)
- 1.67 WORK FUNCTION DESIGN TO INCREASE DENSITY OF NANOSHEET DEVICES (18511064)
- 1.68 NANOSTRUCTURE WITH VARIOUS WIDTHS (18521951)
- 1.69 METHOD OF MANUFACTURING GATE STRUCTURE AND METHOD OF MANUFACTURING FIN-FIELD EFFECT TRANSISTOR (18522265)
- 1.70 METHOD OF MAKING POLYSILICON STRUCTURE INCLUDING PROTECTIVE LAYER (18521404)
- 1.71 SEMICONDUCTOR DEVICE AND FABRICATING THE SAME (18521975)
- 1.72 SEMICONDUCTOR DEVICE STRUCTURE AND METHODS OF FORMING THE SAME (18513439)
- 1.73 UNIFORM GATE WIDTH FOR NANOSTRUCTURE DEVICES (18522687)
- 1.74 TRANSISTOR ISOLATION REGIONS AND METHODS OF FORMING THE SAME (18526397)
- 1.75 IMAGE SENSOR PACKAGING AND METHODS FOR FORMING THE SAME (18155491)
- 1.76 METHOD OF MAKING SEMICONDUCTOR DEVICE INCLUDING METAL INSULATOR METAL CAPACITOR (18522752)
- 1.77 TRENCH CAPACITOR STRUCTURE AND METHODS OF MANUFACTURING (18297282)
- 1.78 SEMICONDUCTOR DEVICE STRUCTURE (18520214)
- 1.79 REDUCING PARASITIC CAPACITANCE IN SEMICONDUCTOR DEVICES (18520346)
- 1.80 SUPPORTIVE LAYER IN SOURCE/DRAINS OF FINFET DEVICES (18520917)
- 1.81 Source/Drain Metal Contact and Formation Thereof (18520996)
- 1.82 SEMICONDUCTOR DEVICE HAVING CONTACT FEATURE AND METHOD OF FABRICATING THE SAME (18521701)
- 1.83 SEMICONDUCTOR DEVICE AND METHOD FOR FORMING THE SAME (18151304)
- 1.84 SEMICONDUCTOR STRUCTURE AND METHOD OF FORMING THE SAME (18152938)
- 1.85 SEMICONDUCTOR DEVICE CONTACT STRUCTURES AND METHODS OF FABRICATING THEREOF (18519714)
- 1.86 METHOD FOR FORMING SEMICONDUCTOR DEVICE (18526429)
- 1.87 TRANSISTOR AND SEMICONDUCTOR DEVICE WITH MULTIPLE THRESHOLD VOLTAGES AND FABRICATION METHOD THEREOF (18151481)
- 1.88 MULTIPLE GATE PATTERNING METHODS TOWARDS FUTURE NANOSHEET SCALING (18167718)
- 1.89 SEMICONDUCTOR DEVICE WITH BACKSIDE GATE ISOLATION STRUCTURE AND METHOD FOR FORMING THE SAME (18520730)
- 1.90 SEMICONDUCTOR DEVICE STRUCTURE AND METHODS OF FORMING THE SAME (18097249)
- 1.91 HYBRID CONDUCTIVE STRUCTURES (18516373)
- 1.92 SILICIDE STRUCTURES IN TRANSISTORS AND METHODS OF FORMING (18520326)
- 1.93 METAL SOURCE/DRAIN FEATURES (18521931)
- 1.94 AREA-SELECTIVE REMOVAL AND SELECTIVE METAL CAP (18153597)
- 1.95 SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING THEREOF (18518162)
- 1.96 SEMICONDUCTOR DEVICE AND METHOD FOR FORMING THE SAME (18522064)
- 1.97 CONFORMAL TRANSFER DOPING METHOD FOR FIN-LIKE FIELD EFFECT TRANSISTOR (18524417)
- 1.98 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF (18526360)
- 1.99 SEMICONDUCTOR STRUCTURE (18526422)
- 1.100 METHOD OF WRITING TO OR ERASING MULTI-BIT MEMORY STORAGE DEVICE (18518716)
- 1.101 FINFET STRUCTURE AND METHOD WITH REDUCED FIN BUCKLING (18521584)
- 1.102 METHOD FOR FABRICATING A STRAINED STRUCTURE AND STRUCTURE FORMED (18522461)
- 1.103 EPITAXIAL SOURCE/DRAIN STRUCTURES FOR MULTIGATE DEVICES AND METHODS OF FABRICATING THEREOF (18523214)
- 1.104 FinFET Device and Method of Forming Same (18526317)
- 1.105 Crystallization of High-K Dielectric Layer (18188314)
- 1.106 THIN FILM TRANSISTOR, SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THIN FILM TRANSISTOR (18518573)
- 1.107 BI-DIRECTIONAL SCAN FLIP-FLOP CIRCUIT AND METHOD (18152017)
- 1.108 INPUT BUFFER CIRCUIT (18521169)
- 1.109 FLEXIBLE MERGE SCHEME FOR SOURCE/DRAIN EPITAXY REGIONS (18517275)
- 1.110 COMPACT ELECTRICAL CONNECTION THAT CAN BE USED TO FORM AN SRAM CELL AND METHOD OF MAKING THE SAME (18517277)
- 1.111 INTEGRATED CIRCUIT WITH BACK-SIDE METAL LINE, METHOD OF FABRICATING THE SAME, AND LAYOUT METHOD (18521375)
- 1.112 FLASH MEMORY STRUCTURE AND METHOD OF FORMING THE SAME (18524627)
- 1.113 SEMICONDUCTOR MEMORY STRUCTURE HAVING ENHANCED MEMORY WINDOW AND METHOD FOR MANUFACTURING THE SAME (18171167)
- 1.114 PHASE CHANGE MATERIAL (PCM) SWITCH HAVING LOW HEATER RESISTANCE (18149274)
- 1.115 SEMICONDUCTOR MEMORY DEVICES AND METHODS OF MANUFACTURING THEREOF (18516521)
- 1.116 MEMORY DEVICE, AND INTEGRATED CIRCUIT DEVICE (18521109)
- 1.117 FATIGUE-FREE BIPOLAR LOOP TREATMENT TO REDUCE IMPRINT EFFECT IN PIEZOELECTRIC DEVICE (18513918)
- 1.118 MRAM DEVICE STRUCTURES AND METHODS OF FABRICATING THE SAME (18520427)
- 1.119 GRADIENT PROTECTION LAYER IN MTJ MANUFACTURING (18521399)
- 1.120 SUB 60NM ETCHLESS MRAM DEVICES BY ION BEAM ETCHING FABRICATED T-SHAPED BOTTOM ELECTRODE (18521560)
Patent applications for Taiwan Semiconductor Manufacturing Co., Ltd. on March 21st, 2024
Semiconductor Device, Method and Machine of Manufacture (18515842)
Main Inventor
Jen-Chun Wang
METHOD OF TESTING AN INTEGRATED CIRCUIT AND TESTING SYSTEM (18521432)
Main Inventor
Ankita PATIDAR
CIRCUIT TEST STRUCTURE AND METHOD OF USING (18517260)
Main Inventor
Ching-Fang CHEN
PHOTONIC SEMICONDUCTOR-ON-INSULATOR (SOI) SUBSTRATE AND METHOD FOR FORMING THE PHOTONIC SOI SUBSTRATE (18149260)
Main Inventor
Eugene I-Chun Chen
Packages With Photonic Engines and Method of Forming the Same (18151044)
Main Inventor
Hsing-Kuo Hsia
PHOTOMASK INCLUDING FIDUCIAL MARK AND METHOD OF MAKING A PHOTOMASK (18522942)
Main Inventor
Hsin-Chang LEE
PELLICLE FOR EUV LITHOGRAPHY MASKS AND METHODS OF MANUFACTURING THEREOF (18133945)
Main Inventor
Pei-Cheng HSU
PELLICLE FOR AN EUV LITHOGRAPHY MASK AND A METHOD OF MANUFACTURING THEREOF (18516630)
Main Inventor
Tzu-Ang CHAO
DATA SEQUENCING CIRCUIT AND METHOD (18524587)
Main Inventor
Hidehiro FUJIWARA
SIMULATION MODEL AUTHENTICATION (18171384)
Main Inventor
Katherine H. Chiang
ARRANGEMENT OF SOURCE OR DRAIN CONDUCTORS OF TRANSISTOR (18522906)
Main Inventor
Chih-Yu LAI
METHOD OF MAKING INTEGRATED CIRCUIT WITH ASYMMETRIC MIRRORED LAYOUT ANALOG CELLS (18522888)
Main Inventor
Yu-Tao YANG
DEVICES WITH TRACK-BASED FILL (TBF) METAL PATTERNING (18526324)
Main Inventor
Wei-Yi HU
MEMORY DEVICE (18170109)
Main Inventor
Jhon-Jhy LIAW
MEMORY CIRCUIT AND METHOD OF OPERATING SAME (18521476)
Main Inventor
Yi-Ching LIU
MEMORY CELL AND METHOD OF OPERATING THE SAME (18518736)
Main Inventor
Bo-Feng YOUNG
MEMORY DEVICE SENSE AMPLIFIER CONTROL (18158108)
Main Inventor
Chien-Yuan CHEN
MEMORY CIRCUIT AND METHOD OF OPERATING SAME (18522564)
Main Inventor
Chun-Hao CHANG
SEMICONDUCTOR PROCESSING TOOL AND METHODS OF OPERATION (18162274)
Main Inventor
Yen-Liang LIN
METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE (18123095)
Main Inventor
Chieh-Hsin HSIEH
PHOTO MASK AND LITHOGRAPHY METHOD USING THE SAME (18527024)
Main Inventor
Bao-Chin LI
SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF (18153571)
Main Inventor
Li-Wei Yin
METAL OXIDE LAYERED STRUCTURE AND METHODS OF FORMING THE SAME (18523457)
Main Inventor
Jing-Cheng Lin
SEMICONDUCTOR DEVICE HAVING METAL GATE AND POLY GATE (18527151)
Main Inventor
Alexander KALNITSKY
CLEANING PROCESS FOR SOURCE/DRAIN EPITAXIAL STRUCTURES (18516431)
Main Inventor
Shahaji B. MORE
HETEROGENEOUS BONDING STRUCTURE AND METHOD FORMING SAME (18521284)
Main Inventor
Mirng-Ji Lii
Wafer Positioning Method and Apparatus (18521314)
Main Inventor
Chia-Cheng Chen
STRUCTURES WITH CONVEX CAVITY BOTTOMS (18155926)
Main Inventor
Yu-Lien Huang
CONTACT STRUCTURE OF A SEMICONDUCTOR DEVICE (18519862)
Main Inventor
Joanna Chaw Yane YIN
DEVICE WITH THROUGH VIA AND RELATED METHODS (18172240)
Main Inventor
Chun-Yuan CHEN
SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING THEREOF (18524242)
Main Inventor
Kuei-Yu Kao
Footing Removal in Cut-Metal Process (18521140)
Main Inventor
Ming-Chi Huang
INTEGRATED CIRCUIT DEVICE (18526385)
Main Inventor
Wen-Hsien TU
INTEGRATED CIRCUIT, SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME (18152154)
Main Inventor
Yu-Wei Jiang
SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME (18516969)
Main Inventor
Kuan-Yu Huang
Fan-Out Stacked Package and Methods of Making the Same (18152539)
Main Inventor
Kuo-Chung Yee
SEMICONDUCTOR PACKAGE (18522601)
Main Inventor
Chin-Hua WANG
SEMICONDUCTOR PACKAGE FIXTURE AND METHODS OF MANUFACTURING (18154329)
Main Inventor
Chih-Hao CHEN
PACKAGE STRUCTURE HAVING THERMOELECTRIC COOLER (18152131)
Main Inventor
Chao-Wei Chiu
SEMICONDUCTOR DEVICE INCLUDING INSULATING STRUCTURE SURROUNDING THROUGH VIA AND METHOD FOR FORMING THE SAME (18155912)
Main Inventor
Harry-Haklay Chuang
MEHTOD OF MAKING SEMICONDUCTOR DEVICE HAVING SELF-ALIGNED INTERCONNECT STRUCTURE (18517298)
Main Inventor
Chih-Yu LAI
INTEGRATED CIRCUIT DIE WITH MEMORY MACRO INCLUDING THROUGH-SILICON VIA AND METHOD OF FORMING THE SAME (18524668)
Main Inventor
Hidehiro FUJIWARA
SEMICONDUCTOR PACKAGE AND MANUFACTURING METHOD THEREOF (18522271)
Main Inventor
Chen-Hua Yu
SEMICONDUCTOR DIE PACKAGE WITH CONDUCTIVE LINE CRACK PREVENTION DESIGN (18513866)
Main Inventor
Ya-Huei LEE
PACKAGE STRUCTURE (18186209)
Main Inventor
Chun-Ti Lu
EXTENDED VIA CONNECT FOR PIXEL ARRAY (18149284)
Main Inventor
Meng-Hsien Lin
SEMICONDUCTOR DEVICE STRUCTURE WITH CONDUCTIVE BUMPS (18522622)
Main Inventor
Ming-Da CHENG
MODIFIED FUSE STRUCTURE AND METHOD OF USE (18524621)
Main Inventor
Meng-Sheng CHANG
SEMICONDUCTOR DEVICE INCLUDING PARALLEL CONFIGURATION (18519513)
Main Inventor
Fei Fan DUAN
DIAGONAL BACKSIDE POWER AND SIGNAL ROUTING FOR AN INTEGRATED CIRCUIT (18517706)
Main Inventor
Sheng-Hsiung Chen
SEMICONDUCTOR DEVICE AND METHOD (18522980)
Main Inventor
Chung-Hui CHEN
SEMICONDUCTOR DEVICES WITH BACKSIDE ROUTING AND METHOD OF FORMING SAME (18526445)
Main Inventor
Shang-Wen Chang
SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SAME (18152777)
Main Inventor
Kuan-Chung Lu
Semiconductor Device and Method of Manufacture (18520958)
Main Inventor
Jiun Yi Wu
SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURE (18521711)
Main Inventor
Jing-Cheng Lin
PACKAGE STRUCTURE (18520971)
Main Inventor
Chia-Kuei HSU
BOND HEAD WITH ELASTIC MATERIAL AROUND PERIMETER TO IMPROVE BONDING QUALITY (18166116)
Main Inventor
Chen-Hua YU
SEMICONDUCTOR DEVICE AND METHOD (18526057)
Main Inventor
Chen-Shien Chen
Adding Sealing Material to Wafer edge for Wafer Bonding (18151663)
Main Inventor
Yu-Yi Huang
PACKAGE STRUCTURE AND METHOD OF MANUFACTURING THE SAME (18520467)
Main Inventor
Tsung-Shu Lin
INTEGRATED CIRCUIT PACKAGE AND METHOD (18149806)
Main Inventor
Chih-Wei Wu
SEMICONDUCTOR STRUCTURE, STACKED STRUCTURE, AND MANUFACTURING METHOD THEREOF (18152141)
Main Inventor
Wei-Chung Chang
SEMICONDUCTOR DEVICE, METHOD OF AND SYSTEM FOR MANUFACTURING SEMICONDUCTOR DEVICE (18519486)
Main Inventor
Wei-Hsin TSAI
ACTIVE ZONES WITH OFFSET IN SEMICONDUCTOR CELL (18523023)
Main Inventor
Guo-Huei WU
SEMICONDUCTOR DEVICE INCLUDING SOURCE/DRAIN CONTACT HAVING HEIGHT BELOW GATE STACK (18526395)
Main Inventor
Charles Chew-Yuen YOUNG
ESD STRUCTURE (18520998)
Main Inventor
Chun-Chia HSU
WORK FUNCTION DESIGN TO INCREASE DENSITY OF NANOSHEET DEVICES (18511064)
Main Inventor
Mao-Lin Huang
NANOSTRUCTURE WITH VARIOUS WIDTHS (18521951)
Main Inventor
Hsiao-Han LIU
METHOD OF MANUFACTURING GATE STRUCTURE AND METHOD OF MANUFACTURING FIN-FIELD EFFECT TRANSISTOR (18522265)
Main Inventor
Ji-Cheng Chen
METHOD OF MAKING POLYSILICON STRUCTURE INCLUDING PROTECTIVE LAYER (18521404)
Main Inventor
Yu-Shao CHENG
SEMICONDUCTOR DEVICE AND FABRICATING THE SAME (18521975)
Main Inventor
Kuo-Cheng Ching
SEMICONDUCTOR DEVICE STRUCTURE AND METHODS OF FORMING THE SAME (18513439)
Main Inventor
Jhon Jhy LIAW
UNIFORM GATE WIDTH FOR NANOSTRUCTURE DEVICES (18522687)
Main Inventor
Jui-Chien Huang
TRANSISTOR ISOLATION REGIONS AND METHODS OF FORMING THE SAME (18526397)
Main Inventor
Po-Kang Ho
IMAGE SENSOR PACKAGING AND METHODS FOR FORMING THE SAME (18155491)
Main Inventor
Hao-Lin Yang
METHOD OF MAKING SEMICONDUCTOR DEVICE INCLUDING METAL INSULATOR METAL CAPACITOR (18522752)
Main Inventor
Yan-Jhih HUANG
TRENCH CAPACITOR STRUCTURE AND METHODS OF MANUFACTURING (18297282)
Main Inventor
Yu JIANG
SEMICONDUCTOR DEVICE STRUCTURE (18520214)
Main Inventor
Jung-Chien Cheng
REDUCING PARASITIC CAPACITANCE IN SEMICONDUCTOR DEVICES (18520346)
Main Inventor
Chia-Ta Yu
SUPPORTIVE LAYER IN SOURCE/DRAINS OF FINFET DEVICES (18520917)
Main Inventor
Jung-Chi Tai
Source/Drain Metal Contact and Formation Thereof (18520996)
Main Inventor
Shih-Chuan CHIU
SEMICONDUCTOR DEVICE HAVING CONTACT FEATURE AND METHOD OF FABRICATING THE SAME (18521701)
Main Inventor
Xusheng WU
SEMICONDUCTOR DEVICE AND METHOD FOR FORMING THE SAME (18151304)
Main Inventor
Shih-Yen LIN
SEMICONDUCTOR STRUCTURE AND METHOD OF FORMING THE SAME (18152938)
Main Inventor
Wang-Chun HUANG
SEMICONDUCTOR DEVICE CONTACT STRUCTURES AND METHODS OF FABRICATING THEREOF (18519714)
Main Inventor
I-Wen WU
METHOD FOR FORMING SEMICONDUCTOR DEVICE (18526429)
Main Inventor
Chung-Ting LI
TRANSISTOR AND SEMICONDUCTOR DEVICE WITH MULTIPLE THRESHOLD VOLTAGES AND FABRICATION METHOD THEREOF (18151481)
Main Inventor
Shen-Yang Lee
MULTIPLE GATE PATTERNING METHODS TOWARDS FUTURE NANOSHEET SCALING (18167718)
Main Inventor
Lung-Kun CHU
SEMICONDUCTOR DEVICE WITH BACKSIDE GATE ISOLATION STRUCTURE AND METHOD FOR FORMING THE SAME (18520730)
Main Inventor
Huan-Chieh Su
SEMICONDUCTOR DEVICE STRUCTURE AND METHODS OF FORMING THE SAME (18097249)
Main Inventor
Po-Chin Chang
HYBRID CONDUCTIVE STRUCTURES (18516373)
Main Inventor
Shuen-Shin LIANG
SILICIDE STRUCTURES IN TRANSISTORS AND METHODS OF FORMING (18520326)
Main Inventor
Kai-Di Tzeng
METAL SOURCE/DRAIN FEATURES (18521931)
Main Inventor
Pei-Yu Wang
AREA-SELECTIVE REMOVAL AND SELECTIVE METAL CAP (18153597)
Main Inventor
Shih-Hang Chiu
SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING THEREOF (18518162)
Main Inventor
Shih-Yao Lin
SEMICONDUCTOR DEVICE AND METHOD FOR FORMING THE SAME (18522064)
Main Inventor
Chandrashekhar P. SAVANT
CONFORMAL TRANSFER DOPING METHOD FOR FIN-LIKE FIELD EFFECT TRANSISTOR (18524417)
Main Inventor
Sai-Hooi Yeong
SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF (18526360)
Main Inventor
Han-Yu LIN
SEMICONDUCTOR STRUCTURE (18526422)
Main Inventor
Chia-Ming PAN
METHOD OF WRITING TO OR ERASING MULTI-BIT MEMORY STORAGE DEVICE (18518716)
Main Inventor
Meng-Han LIN
FINFET STRUCTURE AND METHOD WITH REDUCED FIN BUCKLING (18521584)
Main Inventor
Wei-Jen LAI
METHOD FOR FABRICATING A STRAINED STRUCTURE AND STRUCTURE FORMED (18522461)
Main Inventor
Tsung-Lin Lee
EPITAXIAL SOURCE/DRAIN STRUCTURES FOR MULTIGATE DEVICES AND METHODS OF FABRICATING THEREOF (18523214)
Main Inventor
Chen-Ming Lee
FinFET Device and Method of Forming Same (18526317)
Main Inventor
Hsin-Hao Yeh
Crystallization of High-K Dielectric Layer (18188314)
Main Inventor
Chien-Chang CHEN
THIN FILM TRANSISTOR, SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THIN FILM TRANSISTOR (18518573)
Main Inventor
Neil Quinn Murray
BI-DIRECTIONAL SCAN FLIP-FLOP CIRCUIT AND METHOD (18152017)
Main Inventor
Huaixin XIAN
INPUT BUFFER CIRCUIT (18521169)
Main Inventor
Yu-Kai TSAI
FLEXIBLE MERGE SCHEME FOR SOURCE/DRAIN EPITAXY REGIONS (18517275)
Main Inventor
Kai-Hsuan Lee
COMPACT ELECTRICAL CONNECTION THAT CAN BE USED TO FORM AN SRAM CELL AND METHOD OF MAKING THE SAME (18517277)
Main Inventor
YU-KUAN LIN
INTEGRATED CIRCUIT WITH BACK-SIDE METAL LINE, METHOD OF FABRICATING THE SAME, AND LAYOUT METHOD (18521375)
Main Inventor
Chien-Ying CHEN
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