TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD. patent applications published on April 4th, 2024
Summary of the patent applications from TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD. on April 4th, 2024
Recently, TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD. has filed patents for innovative semiconductor devices with unique structures and functionalities. These patents cover technologies such as forming package structures by bonding multiple chip structures on a semiconductor substrate using various bonding techniques and protective layers. The semiconductor devices described in the patents include magnetic tunnel junction structures, ferroelectric field-effect transistors (FeFETs), and ferroelectric memory devices.
Notable applications of these patented technologies include:
- Advanced semiconductor devices like microprocessors, memory chips, and sensors.
- Magnetic memory devices, spintronics applications, and magnetic sensors.
- Memory devices, sensors, and actuators.
- Non-volatile memory devices, low-power logic circuits, and sensor applications.
These innovative semiconductor technologies aim to enhance data storage capabilities, improve energy efficiency, increase data transfer speeds, and provide higher performance and functionality in various electronic devices across industries such as consumer electronics, automotive, and aerospace.
Contents
- 1 Patent applications for TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD. on April 4th, 2024
- 1.1 SEMICONDUCTOR CHIP AND SEQUENCE CHECKING CIRCUIT (18190144)
- 1.2 PHOTORESIST AND FORMATION METHOD THEREOF (18314566)
- 1.3 SYSTEM AND METHOD FOR A LOW VOLTAGE SUPPLY BANDGAP (18169568)
- 1.4 INTEGRATED CIRCUIT LAYOUT GENERATION METHOD AND SYSTEM (18519405)
- 1.5 SENSE AMPLIFIER AND OPERATING METHOD OF THE SAME (18169100)
- 1.6 INDUCTOR AND METHOD OF FORMING THE SAME (18152726)
- 1.7 Semiconductor Device and Method (18525473)
- 1.8 PHOTORESIST AND FORMATION METHOD THEREOF (18361361)
- 1.9 INTEGRATED CIRCUIT PACKAGES AND METHODS (18150256)
- 1.10 TRIMMING METHOD (18152715)
- 1.11 SELF-ALIGNED CONTACT LANDING ON A METAL CIRCUIT (18305708)
- 1.12 BARRIER LAYER FOR WEAKENED BOUNDARY EFFECT (18153553)
- 1.13 CONTACT AIR GAP FORMATION AND STRUCTURES THEREOF (18526828)
- 1.14 Multi-Gate Device And Related Methods (18526839)
- 1.15 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF (18099697)
- 1.16 SEMICONDUCTOR DEVICE AND METHODS OF MANUFACTURING (18162299)
- 1.17 Semiconductor Structures And Methods Of Forming The Same (18194224)
- 1.18 PACKAGED INTERCONNECT STRUCTURES (18306702)
- 1.19 METHODS FOR FORMING SEMICONDUCTOR PACKAGE (18166109)
- 1.20 SEMICONDUCTOR DEVICE AND METHODS OF MANUFACTURE (18178229)
- 1.21 Semiconductor Device with Discrete Blocks (18525273)
- 1.22 SEMICONDUCTOR PACKAGE AND MANUFACTURING METHOD THEREOF (18152176)
- 1.23 Integrated Standard Cell Structure (18522727)
- 1.24 INTEGRATED CIRCUIT PROTECTION DEVICE AND METHOD (18309172)
- 1.25 Semiconductor Structure Cutting Process and Structures Formed Thereby (18526062)
- 1.26 Semiconductor Structure Cutting Process and Structures Formed Thereby (18526290)
- 1.27 HIGH PERFORMANCE MOSFETS HAVING VARYING CHANNEL STRUCTURES (18525988)
- 1.28 SEMICONDUCTOR DEVICE (18170259)
- 1.29 SHIFTED MICRO-LENSES FOR INCREASED IMAGING DEVICE PERFORMANCE (18150893)
- 1.30 SEMICONDUCTOR DIE PACKAGE AND METHODS OF FORMATION (18151059)
- 1.31 FILM MODIFICATION FOR GATE CUT PROCESS (18151792)
- 1.32 SEMICONDUCTOR DEVICE (18152169)
- 1.33 SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING THEREOF (18169597)
- 1.34 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF (18178522)
- 1.35 SEMICONDUCTOR STRUCTURES AND METHODS THEREOF (18519805)
- 1.36 SEMICONDUCTOR DEVICE AND METHOD (18525521)
- 1.37 COMPOSITE GATE DIELECTRIC FOR HIGH-VOLTAGE DEVICE (18150266)
- 1.38 INTEGRATED CIRCUIT STRUCTURE AND METHOD FOR FABRICATING THE SAME (18190444)
- 1.39 SEMICONDUCTOR STRUCTURE AND METHOD FOR FORMING THE SAME (18172703)
- 1.40 METHOD OF MODULATING MULTI-GATE DEVICE CHANNELS AND STRUCTURES THEREOF (18157054)
- 1.41 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF (18106812)
- 1.42 MULTI-GATE DEVICE INNER SPACER AND METHODS THEREOF (18159625)
- 1.43 Low-K Gate Spacer and Methods for Forming the Same (18526084)
- 1.44 SPACER FORMATION METHOD FOR MULTI-GATE DEVICE AND STRUCTURES THEREOF (18159631)
- 1.45 SOURCE/DRAIN FORMATION WITH REDUCED SELECTIVE LOSS DEFECTS (18521556)
- 1.46 MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE (18526444)
- 1.47 SEMICONDUCTOR STRUCTURE WITH DIELECTRIC SPACER AND METHOD FOR MANUFACTURING THE SAME (18177909)
- 1.48 FIN FIELD EFFECT TRANSISTOR (FINFET) DEVICE STRUCTURE (18521913)
- 1.49 THRESHOLD VOLTAGE MODULATION FOR THIN FILM TRANSISTORS (18149312)
- 1.50 SEMICONDUCTOR DEVICE AND FABRICATING METHOD THEREOF (18152157)
- 1.51 TRANSISTOR DEVICE WITH MULTI-LAYER CHANNEL STRUCTURE (18149715)
- 1.52 THREE-DIMENSIONAL MEMORY DEVICE AND METHOD (18526663)
- 1.53 ANALOG NON-VOLATILE MEMORY DEVICE USING POLY FERRORELECTRIC FILM WITH RANDOM POLARIZATION DIRECTIONS (18525301)
- 1.54 SEMICONDUCTOR DEVICE (18526454)
- 1.55 SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME (18152171)
- 1.56 STRUCTURE AND FORMATION METHOD OF PACKAGE WITH HYBRID INTERCONNECTION (18163412)
Patent applications for TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD. on April 4th, 2024
SEMICONDUCTOR CHIP AND SEQUENCE CHECKING CIRCUIT (18190144)
Main Inventor
Hung-Yi CHANG
PHOTORESIST AND FORMATION METHOD THEREOF (18314566)
Main Inventor
Jui-Hsiung LIU
SYSTEM AND METHOD FOR A LOW VOLTAGE SUPPLY BANDGAP (18169568)
Main Inventor
Min-Shin Wu
INTEGRATED CIRCUIT LAYOUT GENERATION METHOD AND SYSTEM (18519405)
Main Inventor
Ke-Ying SU
SENSE AMPLIFIER AND OPERATING METHOD OF THE SAME (18169100)
Main Inventor
Shigeki SHIMOMURA
INDUCTOR AND METHOD OF FORMING THE SAME (18152726)
Main Inventor
Po-Sheng Lu
Semiconductor Device and Method (18525473)
Main Inventor
Ching-Yu Chang
PHOTORESIST AND FORMATION METHOD THEREOF (18361361)
Main Inventor
Jui-Hsiung LIU
INTEGRATED CIRCUIT PACKAGES AND METHODS (18150256)
Main Inventor
Hsu-Hsien Chen
TRIMMING METHOD (18152715)
Main Inventor
An-Hsuan Lee
SELF-ALIGNED CONTACT LANDING ON A METAL CIRCUIT (18305708)
Main Inventor
Ming-Hsun LIN
BARRIER LAYER FOR WEAKENED BOUNDARY EFFECT (18153553)
Main Inventor
Yu-Xuan Wang
CONTACT AIR GAP FORMATION AND STRUCTURES THEREOF (18526828)
Main Inventor
Sai-Hooi YEONG
Multi-Gate Device And Related Methods (18526839)
Main Inventor
Kuan-Ting PAN
SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF (18099697)
Main Inventor
Li WANG
SEMICONDUCTOR DEVICE AND METHODS OF MANUFACTURING (18162299)
Main Inventor
Fu-Ting SUNG
Semiconductor Structures And Methods Of Forming The Same (18194224)
Main Inventor
Wen-Chiung Tu
PACKAGED INTERCONNECT STRUCTURES (18306702)
Main Inventor
Kai-Fung CHANG
METHODS FOR FORMING SEMICONDUCTOR PACKAGE (18166109)
Main Inventor
Yu-Hung LIN
SEMICONDUCTOR DEVICE AND METHODS OF MANUFACTURE (18178229)
Main Inventor
Hsing-Kuo Hsia
Semiconductor Device with Discrete Blocks (18525273)
Main Inventor
Ching-Wen Hsiao
SEMICONDUCTOR PACKAGE AND MANUFACTURING METHOD THEREOF (18152176)
Main Inventor
Tian Hu
Integrated Standard Cell Structure (18522727)
Main Inventor
Fang Chen
INTEGRATED CIRCUIT PROTECTION DEVICE AND METHOD (18309172)
Main Inventor
Chia-Lin HSU
Semiconductor Structure Cutting Process and Structures Formed Thereby (18526062)
Main Inventor
Ryan Chia-Jen Chen
Semiconductor Structure Cutting Process and Structures Formed Thereby (18526290)
Main Inventor
Chih-Chang Hung
HIGH PERFORMANCE MOSFETS HAVING VARYING CHANNEL STRUCTURES (18525988)
Main Inventor
Tetsu Ohtou
SEMICONDUCTOR DEVICE (18170259)
Main Inventor
Ming-Heng TSAI
SHIFTED MICRO-LENSES FOR INCREASED IMAGING DEVICE PERFORMANCE (18150893)
Main Inventor
Cheng Yu Huang
SEMICONDUCTOR DIE PACKAGE AND METHODS OF FORMATION (18151059)
Main Inventor
Shu-Hui SU
FILM MODIFICATION FOR GATE CUT PROCESS (18151792)
Main Inventor
Heng-Chia Su
SEMICONDUCTOR DEVICE (18152169)
Main Inventor
Ta-Chun LIN
SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING THEREOF (18169597)
Main Inventor
Tzu-Ging Lin
SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF (18178522)
Main Inventor
Yi-Tse Hung
SEMICONDUCTOR STRUCTURES AND METHODS THEREOF (18519805)
Main Inventor
Wei Ju Lee
SEMICONDUCTOR DEVICE AND METHOD (18525521)
Main Inventor
Hsin-Yi Lee
COMPOSITE GATE DIELECTRIC FOR HIGH-VOLTAGE DEVICE (18150266)
Main Inventor
Jhu-Min Song
INTEGRATED CIRCUIT STRUCTURE AND METHOD FOR FABRICATING THE SAME (18190444)
Main Inventor
Wen-Li CHIU
SEMICONDUCTOR STRUCTURE AND METHOD FOR FORMING THE SAME (18172703)
Main Inventor
Jia-Ni YU
METHOD OF MODULATING MULTI-GATE DEVICE CHANNELS AND STRUCTURES THEREOF (18157054)
Main Inventor
Ko-Cheng LIU
SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF (18106812)
Main Inventor
Jia-Chuan YOU
MULTI-GATE DEVICE INNER SPACER AND METHODS THEREOF (18159625)
Main Inventor
Chih-Ching WANG
Low-K Gate Spacer and Methods for Forming the Same (18526084)
Main Inventor
Wen-Kai Lin
SPACER FORMATION METHOD FOR MULTI-GATE DEVICE AND STRUCTURES THEREOF (18159631)
Main Inventor
Che-Lun CHANG
SOURCE/DRAIN FORMATION WITH REDUCED SELECTIVE LOSS DEFECTS (18521556)
Main Inventor
Chih-Chiang Chang
MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE (18526444)
Main Inventor
Yu-Lien HUANG
SEMICONDUCTOR STRUCTURE WITH DIELECTRIC SPACER AND METHOD FOR MANUFACTURING THE SAME (18177909)
Main Inventor
Che-Lun Chang
FIN FIELD EFFECT TRANSISTOR (FINFET) DEVICE STRUCTURE (18521913)
Main Inventor
Chun-Hsiung TSAI
THRESHOLD VOLTAGE MODULATION FOR THIN FILM TRANSISTORS (18149312)
Main Inventor
Yan-Yi Chen
SEMICONDUCTOR DEVICE AND FABRICATING METHOD THEREOF (18152157)
Main Inventor
Wu-Wei Tsai
TRANSISTOR DEVICE WITH MULTI-LAYER CHANNEL STRUCTURE (18149715)
Main Inventor
Ya-Yun Cheng
THREE-DIMENSIONAL MEMORY DEVICE AND METHOD (18526663)
Main Inventor
TsuChing Yang
ANALOG NON-VOLATILE MEMORY DEVICE USING POLY FERRORELECTRIC FILM WITH RANDOM POLARIZATION DIRECTIONS (18525301)
Main Inventor
Chih-Sheng Chang
SEMICONDUCTOR DEVICE (18526454)
Main Inventor
Tzu-Yu CHEN
SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME (18152171)
Main Inventor
Han-Jong Chia
STRUCTURE AND FORMATION METHOD OF PACKAGE WITH HYBRID INTERCONNECTION (18163412)
Main Inventor
Tsung-Fu TSAI
