Samsung electronics co., ltd. (20240136234). METHOD OF MEASURING OVERLAY OFFSET AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE USING THE SAME simplified abstract
Contents
- 1 METHOD OF MEASURING OVERLAY OFFSET AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE USING THE SAME
- 1.1 Organization Name
- 1.2 Inventor(s)
- 1.3 METHOD OF MEASURING OVERLAY OFFSET AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE USING THE SAME - A simplified explanation of the abstract
- 1.4 Simplified Explanation
- 1.5 Potential Applications
- 1.6 Problems Solved
- 1.7 Benefits
- 1.8 Potential Commercial Applications
- 1.9 Possible Prior Art
- 1.10 Original Abstract Submitted
METHOD OF MEASURING OVERLAY OFFSET AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE USING THE SAME
Organization Name
Inventor(s)
Seunghak Park of Suwon-si (KR)
METHOD OF MEASURING OVERLAY OFFSET AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE USING THE SAME - A simplified explanation of the abstract
This abstract first appeared for US patent application 20240136234 titled 'METHOD OF MEASURING OVERLAY OFFSET AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE USING THE SAME
Simplified Explanation
The method described in the abstract involves measuring an overlay offset by detecting the positions of patterns on a substrate and using zernike polynomial modeling to determine the offset. Here are some bullet points to explain the innovation:
- The method involves providing a substrate with lower and upper patterns, acquiring overlay information by detecting positions of the patterns, and calculating the overlay offset using zernike polynomial modeling.
- The innovation allows for accurate measurement of overlay offset, which is crucial in the manufacturing of electronic devices.
- By detecting the overlay offset, compensation overlay information can be acquired to improve the alignment of patterns on the substrate.
- The method includes analyzing the radial tilting component of the overlay offset to ensure precise alignment of patterns.
Potential Applications
This technology can be applied in the semiconductor industry for the manufacturing of integrated circuits and other electronic devices where precise alignment of patterns is essential.
Problems Solved
This technology solves the problem of accurately measuring overlay offset between patterns on a substrate, which is crucial for ensuring the quality and functionality of electronic devices.
Benefits
The benefits of this technology include improved accuracy in measuring overlay offset, leading to enhanced alignment of patterns and overall quality of electronic devices.
Potential Commercial Applications
This technology can be commercially applied in semiconductor manufacturing facilities to improve the production process and ensure the quality of electronic devices.
Possible Prior Art
One possible prior art in this field is the use of image recognition software to measure overlay offset in semiconductor manufacturing. Another prior art could be the use of mathematical models to analyze pattern alignment on substrates.
What are the limitations of this method in measuring overlay offset accurately?
One limitation of this method could be the complexity of zernike polynomial modeling, which may require specialized knowledge and expertise to implement effectively. Additionally, variations in substrate materials or patterns could affect the accuracy of the measurements.
How does this method compare to traditional techniques for measuring overlay offset in semiconductor manufacturing?
This method offers a more precise and automated approach to measuring overlay offset compared to traditional techniques, which may rely on manual measurements or less sophisticated modeling methods. By using zernike polynomial modeling, this method can provide more accurate and reliable results in measuring overlay offset.
Original Abstract Submitted
a method of measuring an overlay offset, the method includes: providing a substrate including a lower pattern and an upper pattern, wherein the lower pattern is disposed in a cell area, and the upper pattern is disposed on the lower pattern; acquiring a first piece of overlay information about a first position of the lower pattern and a second position of the upper pattern by detecting a pupil image of a joint position that is between the upper pattern and the lower pattern; detecting an overlay offset of the second position of the upper pattern relative to the first position of the lower pattern through zernike polynomial modeling; and acquiring compensation overlay information on the upper pattern from the overlay offset of the second position, wherein the overlay offset includes a radial tilting component.
