Difference between revisions of "Samsung electronics co., ltd. (20240130138). SEMICONDUCTOR MEMORY DEVICE AND ELECTRONIC SYSTEM INCLUDING THE SAME simplified abstract"

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Latest revision as of 17:00, 20 April 2024

SEMICONDUCTOR MEMORY DEVICE AND ELECTRONIC SYSTEM INCLUDING THE SAME

Organization Name

samsung electronics co., ltd.

Inventor(s)

Yukio Hayakawa of SUWON-SI (KR)

Yong Seok Kim of SUWON-SI (KR)

Bong Yong Lee of SUWON-SI (KR)

Si Yeon Cho of SUWON-SI (KR)

SEMICONDUCTOR MEMORY DEVICE AND ELECTRONIC SYSTEM INCLUDING THE SAME - A simplified explanation of the abstract

This abstract first appeared for US patent application 20240130138 titled 'SEMICONDUCTOR MEMORY DEVICE AND ELECTRONIC SYSTEM INCLUDING THE SAME

Simplified Explanation

The semiconductor memory device described in the patent application includes a cell substrate, gate electrodes stacked on the cell substrate, first and second channel structures, and a bit line. The first and second channel structures each consist of a ferroelectric layer, a channel layer, a gate insulating layer, and a back gate electrode.

  • Cell substrate
  • Gate electrodes stacked on the cell substrate
  • First and second channel structures with ferroelectric layers
  • Bit line on top of gate electrodes

Potential Applications

The technology described in this patent application could be applied in:

  • Non-volatile memory devices
  • High-speed data storage systems

Problems Solved

This technology addresses the following issues:

  • Enhancing memory storage capacity
  • Improving data retention and retrieval speeds

Benefits

The benefits of this technology include:

  • Increased memory density
  • Faster data access times

Potential Commercial Applications

This technology could be utilized in:

  • Solid-state drives (SSDs)
  • Embedded memory in consumer electronics

Possible Prior Art

One possible prior art for this technology could be:

  • Ferroelectric memory devices with similar channel structures

Unanswered Questions

1. How does the ferroelectric layer impact the performance of the memory device? 2. What are the manufacturing costs associated with implementing this technology compared to traditional memory devices?


Original Abstract Submitted

a semiconductor memory device includes a cell substrate, a plurality of gate electrodes sequentially stacked on the cell substrate and extending in a first direction, first and second channel structures extending in a second direction different from the first direction and penetrating the plurality of gate electrodes, and a bit line disposed on the plurality of gate electrodes. the first and second channel structures each include a ferroelectric layer, a channel layer, a gate insulating layer and a back gate electrode, which are sequentially disposed on side walls of the plurality of gate electrodes. the first channel structure and the second channel structure are adjacent to each other in the first direction and share a bit line.