Samsung electronics co., ltd. (20240127883). METHODS OF TESTING NONVOLATILE MEMORY DEVICES AND NONVOLATILE MEMORY DEVICES simplified abstract
Contents
- 1 METHODS OF TESTING NONVOLATILE MEMORY DEVICES AND NONVOLATILE MEMORY DEVICES
- 1.1 Organization Name
- 1.2 Inventor(s)
- 1.3 METHODS OF TESTING NONVOLATILE MEMORY DEVICES AND NONVOLATILE MEMORY DEVICES - A simplified explanation of the abstract
- 1.4 Simplified Explanation
- 1.5 Potential Applications
- 1.6 Problems Solved
- 1.7 Benefits
- 1.8 Potential Commercial Applications
- 1.9 Possible Prior Art
- 1.10 Original Abstract Submitted
METHODS OF TESTING NONVOLATILE MEMORY DEVICES AND NONVOLATILE MEMORY DEVICES
Organization Name
Inventor(s)
Yeonwook Jung of Suwon-si (KR)
Myeongwoo Lee of Suwon-si (KR)
Jongchul Park of Suwon-si (KR)
METHODS OF TESTING NONVOLATILE MEMORY DEVICES AND NONVOLATILE MEMORY DEVICES - A simplified explanation of the abstract
This abstract first appeared for US patent application 20240127883 titled 'METHODS OF TESTING NONVOLATILE MEMORY DEVICES AND NONVOLATILE MEMORY DEVICES
Simplified Explanation
The patent application describes a method of testing a nonvolatile memory device with circuit elements in different semiconductor layers, mimicking the on-state of memory cells, and determining the normal operation of the page buffer circuit based on the sensing and latching operation.
- First semiconductor layer with circuit elements
- Second semiconductor layer with page buffer circuit and driver
- Mimicking on-state of memory cells with discharging path
- Sensing and latching operation in page buffer circuit
- Determining normal operation based on sensing and latching operation
Potential Applications
The technology described in the patent application could be applied in the testing and quality control processes of nonvolatile memory devices in semiconductor manufacturing.
Problems Solved
This technology helps in ensuring the proper functioning of the page buffer circuit in nonvolatile memory devices by mimicking the on-state of memory cells and detecting any abnormalities in the circuit operation.
Benefits
- Improved testing accuracy for nonvolatile memory devices - Enhanced quality control processes in semiconductor manufacturing - Efficient detection of circuit operation issues
Potential Commercial Applications
Optimizing Page Buffer Circuit Testing in Nonvolatile Memory Devices
Possible Prior Art
There may be prior art related to testing methods for semiconductor devices or memory devices that involve circuit element testing and detection of abnormalities in circuit operation.
What is the specific technology used in the sensing and latching operation of the page buffer circuit?
The specific technology used in the sensing and latching operation of the page buffer circuit is not detailed in the abstract. Further information from the full patent application may provide insights into the specific techniques or components involved in this operation.
How does the discharging path between the sensing node and discharge transistors contribute to mimicking the on-state of memory cells?
The abstract mentions the presence of at least one discharging path between a sensing node and a plurality of discharge transistors in the driver circuit. Understanding the mechanism by which this discharging path contributes to mimicking the on-state of memory cells would require a deeper dive into the technical details provided in the full patent application.
Original Abstract Submitted
in a method of testing a nonvolatile memory device including a first semiconductor layer in which and a second semiconductor layer formed prior to the first semiconductor layer, circuit elements including a page buffer circuit and at least one driver spaced apart from the page buffer circuit are provided in the second semiconductor layer, an on-state of nonvolatile memory cells which are not connected to the page buffer circuit is mimicked by providing at least one discharging path between a sensing node and a plurality of discharge transistors of the at least one driver, a sensing and latching operation with the on-state being mimicked is performed in the page buffer circuit and whether the page buffer circuit operates normally is determined based on a result of the sensing and latching operation.
