Samsung electronics co., ltd. (20240127426). DEFECT DETECTING DEVICE AND METHOD simplified abstract
Contents
- 1 DEFECT DETECTING DEVICE AND METHOD
- 1.1 Organization Name
- 1.2 Inventor(s)
- 1.3 DEFECT DETECTING DEVICE AND METHOD - A simplified explanation of the abstract
- 1.4 Simplified Explanation
- 1.5 Potential Applications
- 1.6 Problems Solved
- 1.7 Benefits
- 1.8 Potential Commercial Applications
- 1.9 Possible Prior Art
- 1.10 Unanswered Questions
- 1.11 Original Abstract Submitted
DEFECT DETECTING DEVICE AND METHOD
Organization Name
Inventor(s)
Sungwook Hwang of Suwon-si (KR)
DEFECT DETECTING DEVICE AND METHOD - A simplified explanation of the abstract
This abstract first appeared for US patent application 20240127426 titled 'DEFECT DETECTING DEVICE AND METHOD
Simplified Explanation
The abstract of the patent application describes a test device that uses reference data stored in memory to measure the height of a pattern on a semiconductor sample based on its shadow length.
- The test device includes a memory and a controller.
- The memory stores reference data such as a reference image, height, shadow length, and correlation value.
- The controller receives an image of a pattern on a semiconductor sample, measures the shadow length, and calculates the height based on the reference data.
Potential Applications
This technology could be applied in semiconductor manufacturing for quality control and process optimization.
Problems Solved
This technology helps in accurately measuring the height of patterns on semiconductor samples, which is crucial for ensuring the quality and performance of semiconductor devices.
Benefits
- Improved accuracy in measuring pattern heights - Enhanced quality control in semiconductor manufacturing processes - Increased efficiency in process optimization
Potential Commercial Applications
Optimizing semiconductor manufacturing processes for improved quality control and efficiency.
Possible Prior Art
Prior art may include similar devices or methods used in semiconductor manufacturing for measuring pattern heights.
Unanswered Questions
How does this technology compare to existing methods for measuring pattern heights in semiconductor samples?
Answer: This article does not provide a direct comparison with existing methods, leaving the reader to wonder about the advantages and limitations of this technology in relation to current practices.
What are the potential limitations or challenges in implementing this technology in semiconductor manufacturing processes?
Answer: The article does not address any potential obstacles or difficulties that may arise when integrating this technology into existing semiconductor manufacturing workflows, leaving room for speculation on the practical implications of its implementation.
Original Abstract Submitted
a test device includes a memory and a controller. the memory stores reference data including a reference image obtained by photographing a reference pattern on a first semiconductor sample, a first height of the reference pattern, a first shadow length of the reference pattern, and a reference value that represents a correlation between the first height and the first shadow length. the controller receives an image obtained by photographing a pattern on a second semiconductor sample, measures a second shadow length of the pattern from the image, and calculates a second height of the pattern from the second shadow length based on the reference data.
