Samsung electronics co., ltd. (20240120287). OVERLAY MARK, MANUFACTURING METHOD USING THE SAME, AND SEMICONDUCTOR DEVICE USING THE SAME simplified abstract

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OVERLAY MARK, MANUFACTURING METHOD USING THE SAME, AND SEMICONDUCTOR DEVICE USING THE SAME

Organization Name

samsung electronics co., ltd.

Inventor(s)

Sang Won Park of Suwon-si (KR)

A Yeong Cha of Suwon-si (KR)

Byeong-Hwan Son of Suwon-si (KR)

Hye Jin Lee of Suwon-si (KR)

Jung Hyun Choi of Suwon-si (KR)

Jong Hee Han of Suwon-si (KR)

OVERLAY MARK, MANUFACTURING METHOD USING THE SAME, AND SEMICONDUCTOR DEVICE USING THE SAME - A simplified explanation of the abstract

This abstract first appeared for US patent application 20240120287 titled 'OVERLAY MARK, MANUFACTURING METHOD USING THE SAME, AND SEMICONDUCTOR DEVICE USING THE SAME

Simplified Explanation

The overlay mark in the patent application comprises a substrate, a lower overlay, a pattern layer, and an upper overlay with an opening on the pattern layer. The lower overlay does not overlap the upper overlay in the thickness direction of the substrate.

  • Substrate
  • Lower overlay
  • Pattern layer
  • Upper overlay with opening
  • No overlap in thickness direction

Potential Applications

This technology could be applied in:

  • Semiconductor manufacturing
  • Microelectronics industry

Problems Solved

This technology helps in:

  • Improving precision in overlay marks
  • Enhancing the quality of pattern layers

Benefits

The benefits of this technology include:

  • Increased accuracy in alignment
  • Better control over the manufacturing process

Potential Commercial Applications

The potential commercial applications of this technology could be in:

  • Semiconductor fabrication companies
  • Electronics manufacturing industry

Possible Prior Art

One possible prior art could be the use of traditional overlay marks in semiconductor manufacturing processes.

Unanswered Questions

How does this technology impact production costs?

The article does not address the potential impact of this technology on production costs.

What are the environmental implications of this technology?

The article does not discuss the environmental implications of implementing this technology.


Original Abstract Submitted

provided is an overlay mark. the overlay mark comprises a substrate, a lower overlay in the substrate, a pattern layer on the substrate, and an upper overlay defining an opening on the pattern layer. the lower overlay does not overlap the upper overlay in a thickness direction of the substrate.