Samsung electronics co., ltd. (20240096831). SEMICONDUCTOR PACKAGE simplified abstract
Contents
- 1 SEMICONDUCTOR PACKAGE
SEMICONDUCTOR PACKAGE
Organization Name
Inventor(s)
Hyungchul Shin of Suwon-si (KR)
Gwangjae Jeon of Suwon-si (KR)
SEMICONDUCTOR PACKAGE - A simplified explanation of the abstract
This abstract first appeared for US patent application 20240096831 titled 'SEMICONDUCTOR PACKAGE
Simplified Explanation
The semiconductor package described in the patent application includes a first semiconductor chip with a first pad on a first substrate, surrounded by a first insulating layer, and a second semiconductor chip with a second pad below a second substrate, contacting the first pad, and surrounded by a second insulating layer. The first pad has an inclined side surface with two side surfaces inclined at obtuse angles with respect to the second surface.
- First semiconductor chip with first pad on first substrate
- Second semiconductor chip with second pad below second substrate
- Inclined side surface of first pad with two side surfaces inclined at obtuse angles
Potential Applications
The technology described in the patent application could be used in:
- Advanced semiconductor packaging
- High-density integrated circuits
Problems Solved
This technology helps in:
- Improving signal transmission between semiconductor chips
- Enhancing thermal management in semiconductor packages
Benefits
The benefits of this technology include:
- Increased efficiency in semiconductor devices
- Better reliability and performance
Potential Commercial Applications
The potential commercial applications of this technology could be in:
- Consumer electronics
- Telecommunications industry
Possible Prior Art
One possible prior art could be the use of stacked semiconductor chips in a package design to improve performance and functionality.
Unanswered Questions
How does this technology impact the overall cost of semiconductor packaging?
The cost implications of implementing this technology in semiconductor packaging are not addressed in the patent application. It would be interesting to know if the benefits outweigh the potential increase in production costs.
What are the environmental implications of using this technology in semiconductor manufacturing?
The environmental impact of using this technology, such as the materials used in the insulating layers, is not discussed in the patent application. Understanding the sustainability aspects of this innovation would be crucial in evaluating its long-term viability.
Original Abstract Submitted
a semiconductor package includes: a first semiconductor chip including a first pad on a first substrate, and a first insulating layer at least partially surrounding the first pad; and a second semiconductor chip including a second pad below a second substrate and contacting the first pad, and a second insulating layer at least partially surrounding the second pad and contacting the first insulating layer. the first pad includes a first surface contacting the second pad and a second surface opposite the first surface, and an inclined side surface between the first surface and the second surface. the inclined side surface includes a first side surface and a second side surface, facing each other and inclined at a first obtuse angle and a second obtuse angle with respect to the second surface, respectively. each of the first and second obtuse angles is about 100� to about 130�.
